mcu8951.map.eqn

此示例是8051核加频率计的联合设计,带有8051IP核资料

--CB1_STATD[1] is CPU8051C1:inst|MCU80512:inst3|m3s001bo:U1|STATD[1]
CB1_STATD[1] = DFFEAS(VCC, VC1__clk1, RST,  , CB1L59, CB1_SMF,  ,  , VCC);


--CB1_STATD[4] is CPU8051C1:inst|MCU80512:inst3|m3s001bo:U1|STATD[4]
CB1_STATD[4] = DFFEAS(VCC, VC1__clk1, RST,  , CB1L59, CB1_SMC,  ,  , VCC);


--MB1L370 is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|QALE~ICOMBOUT
MB1L370 = !MB1L366 & !CB1_STATD[4] & (MB1L182 # !CB1_STATD[1]);


--CB1_LDV2CK2 is CPU8051C1:inst|MCU80512:inst3|m3s001bo:U1|LDV2CK2
CB1_LDV2CK2 = DFFEAS(CB1L24, VC1__clk1, RST,  ,  ,  ,  ,  ,  );


--PB1_L_PCON[0] is CPU8051C1:inst|MCU80512:inst3|m3s020bo:U12|L_PCON[0]
PB1_L_PCON[0] = DFFEAS(PB1L60, VC1__clk1, RST,  , PB1L64,  ,  ,  ,  );


--F1_Q1[9] is CNT32B:inst10|Q1[9]
F1_Q1[9] = DFFEAS(F1L30, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[8] is CNT32B:inst10|Q1[8]
F1_Q1[8] = DFFEAS(F1L27, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[7] is CNT32B:inst10|Q1[7]
F1_Q1[7] = DFFEAS(F1L24, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[6] is CNT32B:inst10|Q1[6]
F1_Q1[6] = DFFEAS(F1L21, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[5] is CNT32B:inst10|Q1[5]
F1_Q1[5] = DFFEAS(F1L18, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[4] is CNT32B:inst10|Q1[4]
F1_Q1[4] = DFFEAS(F1L15, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[3] is CNT32B:inst10|Q1[3]
F1_Q1[3] = DFFEAS(F1L12, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[2] is CNT32B:inst10|Q1[2]
F1_Q1[2] = DFFEAS(F1L9, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[1] is CNT32B:inst10|Q1[1]
F1_Q1[1] = DFFEAS(F1L6, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1_Q1[0] is CNT32B:inst10|Q1[0]
F1_Q1[0] = DFFEAS(F1L3, VC1__clk1,  ,  ,  ,  ,  ,  ,  );


--F1L3 is CNT32B:inst10|Q1[0]~240
F1L3 = F1_Q1[0] $ VCC;

--F1L4 is CNT32B:inst10|Q1[0]~241
F1L4 = CARRY(F1_Q1[0]);


--F1L6 is CNT32B:inst10|Q1[1]~242
F1L6 = F1_Q1[1] & !F1L4 # !F1_Q1[1] & (F1L4 # GND);

--F1L7 is CNT32B:inst10|Q1[1]~243
F1L7 = CARRY(!F1L4 # !F1_Q1[1]);


--F1L9 is CNT32B:inst10|Q1[2]~244
F1L9 = F1_Q1[2] & (F1L7 $ GND) # !F1_Q1[2] & !F1L7 & VCC;

--F1L10 is CNT32B:inst10|Q1[2]~245
F1L10 = CARRY(F1_Q1[2] & !F1L7);


--F1L12 is CNT32B:inst10|Q1[3]~246
F1L12 = F1_Q1[3] & !F1L10 # !F1_Q1[3] & (F1L10 # GND);

--F1L13 is CNT32B:inst10|Q1[3]~247
F1L13 = CARRY(!F1L10 # !F1_Q1[3]);


--F1L15 is CNT32B:inst10|Q1[4]~248
F1L15 = F1_Q1[4] & (F1L13 $ GND) # !F1_Q1[4] & !F1L13 & VCC;

--F1L16 is CNT32B:inst10|Q1[4]~249
F1L16 = CARRY(F1_Q1[4] & !F1L13);


--F1L18 is CNT32B:inst10|Q1[5]~250
F1L18 = F1_Q1[5] & !F1L16 # !F1_Q1[5] & (F1L16 # GND);

--F1L19 is CNT32B:inst10|Q1[5]~251
F1L19 = CARRY(!F1L16 # !F1_Q1[5]);


--F1L21 is CNT32B:inst10|Q1[6]~252
F1L21 = F1_Q1[6] & (F1L19 $ GND) # !F1_Q1[6] & !F1L19 & VCC;

--F1L22 is CNT32B:inst10|Q1[6]~253
F1L22 = CARRY(F1_Q1[6] & !F1L19);


--F1L24 is CNT32B:inst10|Q1[7]~254
F1L24 = F1_Q1[7] & !F1L22 # !F1_Q1[7] & (F1L22 # GND);

--F1L25 is CNT32B:inst10|Q1[7]~255
F1L25 = CARRY(!F1L22 # !F1_Q1[7]);


--F1L27 is CNT32B:inst10|Q1[8]~256
F1L27 = F1_Q1[8] & (F1L25 $ GND) # !F1_Q1[8] & !F1L25 & VCC;

--F1L28 is CNT32B:inst10|Q1[8]~257
F1L28 = CARRY(F1_Q1[8] & !F1L25);


--F1L30 is CNT32B:inst10|Q1[9]~258
F1L30 = F1_Q1[9] & !F1L28 # !F1_Q1[9] & (F1L28 # GND);

--F1L31 is CNT32B:inst10|Q1[9]~259
F1L31 = CARRY(!F1L28 # !F1_Q1[9]);


--F1L33 is CNT32B:inst10|Q1[10]~260
F1L33 = F1_Q1[10] & (F1L31 $ GND) # !F1_Q1[10] & !F1L31 & VCC;

--F1L34 is CNT32B:inst10|Q1[10]~261
F1L34 = CARRY(F1_Q1[10] & !F1L31);


--F1L36 is CNT32B:inst10|Q1[11]~262
F1L36 = F1_Q1[11] & !F1L34 # !F1_Q1[11] & (F1L34 # GND);

--F1L37 is CNT32B:inst10|Q1[11]~263
F1L37 = CARRY(!F1L34 # !F1_Q1[11]);


--F1L39 is CNT32B:inst10|Q1[12]~264
F1L39 = F1_Q1[12] & (F1L37 $ GND) # !F1_Q1[12] & !F1L37 & VCC;

--F1L40 is CNT32B:inst10|Q1[12]~265
F1L40 = CARRY(F1_Q1[12] & !F1L37);


--F1L42 is CNT32B:inst10|Q1[13]~266
F1L42 = F1_Q1[13] & !F1L40 # !F1_Q1[13] & (F1L40 # GND);

--F1L43 is CNT32B:inst10|Q1[13]~267
F1L43 = CARRY(!F1L40 # !F1_Q1[13]);


--F1L45 is CNT32B:inst10|Q1[14]~268
F1L45 = F1_Q1[14] & (F1L43 $ GND) # !F1_Q1[14] & !F1L43 & VCC;

--F1L46 is CNT32B:inst10|Q1[14]~269
F1L46 = CARRY(F1_Q1[14] & !F1L43);


--F1L48 is CNT32B:inst10|Q1[15]~270
F1L48 = F1_Q1[15] $ F1L46;


--MB1_PORT1_SFR[7] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[7]
MB1_PORT1_SFR[7] = DFFEAS(MB1L274, VC1__clk1, RST,  , MB1L270,  ,  ,  ,  );


--MB1_PORT1_SFR[6] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[6]
MB1_PORT1_SFR[6] = DFFEAS(MB1L263, VC1__clk1, RST,  , MB1L270,  ,  ,  ,  );


--MB1_PORT1_SFR[5] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[5]
MB1_PORT1_SFR[5] = DFFEAS(MB1L258, VC1__clk1, RST,  , MB1L270,  ,  ,  ,  );


--MB1_PORT1_SFR[4] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[4]
MB1_PORT1_SFR[4] = DFFEAS(MB1L253, VC1__clk1, RST,  , MB1L270,  ,  ,  ,  );


--MB1_PORT1_SFR[3] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[3]
MB1_PORT1_SFR[3] = DFFEAS(MB1L248, VC1__clk1, RST,  , MB1L270,  ,  ,  ,  );


--MB1_PORT1_SFR[2] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[2]
MB1_PORT1_SFR[2] = DFFEAS(MB1L243, VC1__clk1, RST,  , MB1L270,  ,  ,  ,  );


--MB1_PORT1_SFR[1] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[1]
MB1_PORT1_SFR[1] = DFFEAS(MB1L238, VC1__clk1, RST,  , MB1L270,  ,  ,  ,  );


--MB1_PORT1_SFR[0] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[0]
MB1_PORT1_SFR[0] = DFFEAS(MB1L233, VC1__clk1, RST,  , MB1L270,  ,  ,  ,  );


--JB1_RAMDI[7] is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[7]
JB1_RAMDI[7] = DFFEAS(JB1L351, VC1__clk1, RST,  , CB1_STATD[6],  ,  ,  ,  );


--MB1L362 is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[7]~ICOMBOUT
MB1L362 = !JB1_RAMDI[7];


--JB1_L_FA[4] is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|L_FA[4]
JB1_L_FA[4] = DFFEAS(JB1L106, VC1__clk1, RST,  , JB1L614,  ,  ,  ,  );


--JB1_L_FA[5] is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|L_FA[5]
JB1_L_FA[5] = DFFEAS(JB1L111, VC1__clk1, RST,  , JB1L614,  ,  ,  ,  );


--JB1L365 is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|RDAT[0]~1595
JB1L365 = JB1_L_FA[4] & JB1_L_FA[5];


--JB1_L_FA[6] is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|L_FA[6]
JB1_L_FA[6] = DFFEAS(JB1L116, VC1__clk1, RST,  , JB1L614,  ,  ,  ,  );


--JB1_SFRWE is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|SFRWE
JB1_SFRWE = DFFEAS(JB1L595, VC1__clk1, RST,  , CB1_STATD[6],  ,  ,  ,  );


--JB1_L_FA[3] is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|L_FA[3]
JB1_L_FA[3] = DFFEAS(JB1L101, VC1__clk1, RST,  , JB1L614,  ,  ,  ,  );


--JB1_L_FA[1] is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|L_FA[1]
JB1_L_FA[1] = DFFEAS(JB1L91, VC1__clk1, RST,  , JB1L614,  ,  ,  ,  );


--JB1_L_FA[2] is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|L_FA[2]
JB1_L_FA[2] = DFFEAS(JB1L96, VC1__clk1, RST,  , JB1L614,  ,  ,  ,  );


--JB1_L_FA[0] is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|L_FA[0]
JB1_L_FA[0] = DFFEAS(JB1L86, VC1__clk1, RST,  , JB1L614,  ,  ,  ,  );


--BC1_A000 is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|m3s039bo:U2|A000
BC1_A000 = JB1_L_FA[1] # JB1_L_FA[2] # JB1_L_FA[0];


--BC1L41 is CPU8051C1:inst|MCU80512:inst3|m3s008bo:U7|m3s039bo:U2|SFRW[21]~377
BC1L41 = JB1_SFRWE & !JB1_L_FA[3] & !BC1_A000;


--MB1L358 is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[7]~42
MB1L358 = JB1L365 & !JB1_L_FA[6] & BC1L41 & !CB1_LDV2CK2;


--QB1_OPC[4] is CPU8051C1:inst|MCU80512:inst3|m3s025bo:U14|OPC[4]
QB1_OPC[4] = DFFEAS(QB1L36, VC1__clk1, RST,  , QB1L53,  ,  ,  ,  );


--UB1L28 is CPU8051C1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~1298
UB1L28 = QB1_OPC[5] & !QB1_OPC[4] & QB1_OPC[7] & QB1_OPC[6];


--CB1_STATD[3] is CPU8051C1:inst|MCU80512:inst3|m3s001bo:U1|STATD[3]