seven_seg_ctrl.vhd

Implement the 7 segment diplay on spartan 3

---------------------------------------------------------------------
--
-- file: seven_seg_ctrl.vhd
--
-- author:Rob Nelson
--
-- description:
--
-- This VHDL file contains much of the code needed to create a
-- four digit seven segment display controller. The file contains the entity
-- declaration, an initial architecture, and some code within the architecture
-- for controlling the digit anode.
--
-- You will need to complete this code to perform the seven segment controller
-- function. Specifically, you will need to do the following:
--  1. Create the logic for the anode select signals (an_sel)
--  2. Create the logic for the segment signals (segments)
--  3. Modify this comment section to include your name and a better
--     description of the operation of the seven segment controller.
--
-- PORTS:
--  clk: global clock input, 50 MHz
--  digit0: The 4-bit value to drive on the first digit of the display
--  digit1: The 4-bit value to drive on the second digit of the display
--  digit2: The 4-bit value to drive on the third digit of the display
--  digit3: The 4-bit value to drive on the fourth digit of the display
--  dp_in: The value to display on the decimal point of each digit. dp_in(3)
--         corresponds to the decimal point for digit 3, dp_in(2) corresponds
--         to the decimal point for digit 2, and so on.
--  segments: The output segment control signals for the display. Read the
--            users manual carefully to see if these signals are low or high
--            asserted. segment(0) corresponds to A, segment(1) corresponds to
--            B, and so on.
--  dp_out: The decimal point output signal (corresponds to DP on the display)
--  an_sel: The anode select lines. an_sel(3) coresponds to AN3, an_sel(2)
--          corresponds to AN2, and so on.
--  
---------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;		

entity seven_seg_ctrl is
  generic (
    COUNTER_BITS : integer := 12        -- Specifies # bits in counter
  );
  port(
    clk      : in  std_logic;                    -- Global clock input, 50MHz
    rst      : in  std_logic;                    -- Global reset input
    digit0   : in  std_logic_vector(3 downto 0); -- Digit 0 inputs
    digit1   : in  std_logic_vector(3 downto 0); -- Digit 1 inputs
    digit2   : in  std_logic_vector(3 downto 0); -- Digit 2 inputs
    digit3   : in  std_logic_vector(3 downto 0); -- Digit 3 inputs
    dp_in    : in  std_logic_vector(3 downto 0); -- Decimal point inputs
    segments : out std_logic_vector(6 downto 0); -- Segment control
    dp_out   : out std_logic;                    -- Decimal point
    an_sel   : out std_logic_vector(3 downto 0)  -- Anode control
  );
end seven_seg_ctrl;


architecture rtl of seven_seg_ctrl is

  -- Anode Sequence Counter
  signal count : unsigned(COUNTER_BITS-1 downto 0); 
  signal anode_select : std_logic_vector(1 downto 0);
  signal digit_select : std_logic_vector(3 downto 0);
  
begin

  -----------------------------------------------------------------------------
  -- Counter operating at 50 MHz
  -----------------------------------------------------------------------------
  process (clk, rst)
  begin
    if clk='1' and clk'event then
      if rst='1' then
         count <= (others=>'0');
      else
         count <= count+1;
      end if;
	end if;
  end process;	

  -----------------------------------------------------------------------------
  -- Anode decode circuitry
  -----------------------------------------------------------------------------

  -- The currently active anode is determined by the top two bits of the
  -- counter.  
  anode_select <= std_logic_vector(count(COUNTER_BITS-1 downto COUNTER_BITS-2));

  -- Modify the code for the an_sel signals
  an_sel <= "1110" when anode_select = "00" else
			"1101" when anode_select = "01" else
			"1011" when anode_select = "10" else
			"0111" when anode_select = "11";

  -----------------------------------------------------------------------------
  -- Digit Select selects between the for input streams
  -----------------------------------------------------------------------------
  
  digit_select   <= digit3 when anode_select = "11" else
					digit2 when anode_select = "10" else
					digit1 when anode_select = "01" else
					digit0 when anode_select = "00";
  
  -----------------------------------------------------------------------------
  -- Segment decode circuitry
  -----------------------------------------------------------------------------
  -- Place your code below (you need to change the logic for an_sel and
  -- segments). std 6 down to 0
			   --  G F ED CBA
  segments <= 	"1000000" when digit_select =	"0000" else
				"1111001" when digit_select =	"0001" else
				"0100100" when digit_select =	"0010" else
				"0110000" when digit_select =	"0011" else
				"0011001" when digit_select =	"0100" else
				"0010010" when digit_select = "0101" else
				"0000010" when digit_select =	"0110" else
				"1111000" when digit_select =	"0111" else
				"0000000" when digit_select =	"1000" else
				"0010000" when digit_select =	"1001" else
				"0001000" when digit_select =	"1010" else
				"0000011" when digit_select =	"1011" else
				"1000110" when digit_select =	"1100" else
				"0100001" when digit_select =	"1101" else
				"0000110" when digit_select =	"1110" else
				"0001110" when digit_select =	"1111";
				

  -----------------------------------------------------------------------------
  -- Decimal Point Multiplexer
  -----------------------------------------------------------------------------
  -- Place your code below
  
  dp_out <= dp_in(3) when anode_select = "11" else
			dp_in(2) when anode_select = "10" else
			dp_in(1) when anode_select = "01" else
			dp_in(0) when anode_select = "00";
  
end rtl;