adc.tan.summary

adc0809用FPGA控制的采样非常好用的实例 自己看书后终结的

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 2.900 ns
From           : EOC
To             : current_state.st2
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 16.800 ns
From           : current_state.st3
To             : OE
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 1.200 ns
From           : EOC
To             : current_state.st2
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 125.00 MHz ( period = 8.000 ns )
From           : current_state.st2
To             : current_state.st2
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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