dds_v.sdo

数字信号源

// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EP1AGX60DF780C6 Package FBGA780
// 

// 
// This SDF file should be used for ModelSim (Verilog) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "dds")
  (DATE "11/28/2008 15:54:08")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 7.2 Build 151 09/26/2007 SJ Web Edition")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE clk\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1137:1137:1137) (1137:1137:1137))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_clkctrl")
    (INSTANCE clk\~clkctrl)
    (DELAY
      (ABSOLUTE
        (PORT inclk[0] (491:491:491) (491:491:491))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_ena_reg")
    (INSTANCE clk\~clkctrl.extena0_reg)
    (DELAY
      (ABSOLUTE
        (PORT d (0:0:0) (0:0:0))
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) q (121:121:121) (121:121:121))
      )
    )
    (TIMINGCHECK
      (SETUP d (posedge clk) (70:70:70))
      (HOLD d (posedge clk) (70:70:70))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[22\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1086:1086:1086) (1086:1086:1086))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_comb")
    (INSTANCE ADD_A\[22\]\~feeder)
    (DELAY
      (ABSOLUTE
        (PORT dataf (6960:6960:6960) (6960:6960:6960))
        (IOPATH dataf combout (76:76:76) (76:76:76))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE reset\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1137:1137:1137) (1137:1137:1137))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_clkctrl")
    (INSTANCE reset\~clkctrl)
    (DELAY
      (ABSOLUTE
        (PORT inclk[0] (491:491:491) (491:491:491))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_ena_reg")
    (INSTANCE reset\~clkctrl.extena0_reg)
    (DELAY
      (ABSOLUTE
        (PORT d (0:0:0) (0:0:0))
        (PORT clk (0:0:0) (0:0:0))
        (IOPATH (posedge clk) q (121:121:121) (121:121:121))
      )
    )
    (TIMINGCHECK
      (SETUP d (posedge clk) (70:70:70))
      (HOLD d (posedge clk) (70:70:70))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE we\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1026:1026:1026) (1026:1026:1026))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[22\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT datain (222:222:222) (222:222:222))
        (PORT aclr (2138:2138:2138) (2138:2138:2138))
        (PORT ena (7340:7340:7340) (7340:7340:7340))
        (IOPATH (posedge clk) regout (136:136:136) (136:136:136))
        (IOPATH (posedge aclr) regout (305:305:305) (305:305:305))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (130:130:130))
      (SETUP ena (posedge clk) (130:130:130))
      (HOLD datain (posedge clk) (214:214:214))
      (HOLD ena (posedge clk) (214:214:214))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[21\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1056:1056:1056) (1056:1056:1056))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_comb")
    (INSTANCE ADD_A\[21\]\~feeder)
    (DELAY
      (ABSOLUTE
        (PORT dataf (6861:6861:6861) (6861:6861:6861))
        (IOPATH dataf combout (76:76:76) (76:76:76))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[21\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT datain (222:222:222) (222:222:222))
        (PORT aclr (2138:2138:2138) (2138:2138:2138))
        (PORT ena (7340:7340:7340) (7340:7340:7340))
        (IOPATH (posedge clk) regout (136:136:136) (136:136:136))
        (IOPATH (posedge aclr) regout (305:305:305) (305:305:305))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (130:130:130))
      (SETUP ena (posedge clk) (130:130:130))
      (HOLD datain (posedge clk) (214:214:214))
      (HOLD ena (posedge clk) (214:214:214))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[20\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1058:1058:1058) (1058:1058:1058))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_comb")
    (INSTANCE ADD_A\[20\]\~feeder)
    (DELAY
      (ABSOLUTE
        (PORT dataf (6431:6431:6431) (6431:6431:6431))
        (IOPATH dataf combout (76:76:76) (76:76:76))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[20\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT datain (222:222:222) (222:222:222))
        (PORT aclr (2138:2138:2138) (2138:2138:2138))
        (PORT ena (7340:7340:7340) (7340:7340:7340))
        (IOPATH (posedge clk) regout (136:136:136) (136:136:136))
        (IOPATH (posedge aclr) regout (305:305:305) (305:305:305))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (130:130:130))
      (SETUP ena (posedge clk) (130:130:130))
      (HOLD datain (posedge clk) (214:214:214))
      (HOLD ena (posedge clk) (214:214:214))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[19\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1078:1078:1078) (1078:1078:1078))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_comb")
    (INSTANCE ADD_A\[19\]\~feeder)
    (DELAY
      (ABSOLUTE
        (PORT dataf (6560:6560:6560) (6560:6560:6560))
        (IOPATH dataf combout (76:76:76) (76:76:76))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[19\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT datain (222:222:222) (222:222:222))
        (PORT aclr (2138:2138:2138) (2138:2138:2138))
        (PORT ena (7340:7340:7340) (7340:7340:7340))
        (IOPATH (posedge clk) regout (136:136:136) (136:136:136))
        (IOPATH (posedge aclr) regout (305:305:305) (305:305:305))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (130:130:130))
      (SETUP ena (posedge clk) (130:130:130))
      (HOLD datain (posedge clk) (214:214:214))
      (HOLD ena (posedge clk) (214:214:214))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[18\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1066:1066:1066) (1066:1066:1066))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[18\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT adatasdata (6557:6557:6557) (6557:6557:6557))
        (PORT aclr (2138:2138:2138) (2138:2138:2138))
        (PORT ena (7340:7340:7340) (7340:7340:7340))
        (IOPATH (posedge clk) regout (136:136:136) (136:136:136))
        (IOPATH (posedge aclr) regout (305:305:305) (305:305:305))
      )
    )
    (TIMINGCHECK
      (SETUP adatasdata (posedge clk) (130:130:130))
      (SETUP ena (posedge clk) (130:130:130))
      (HOLD adatasdata (posedge clk) (214:214:214))
      (HOLD ena (posedge clk) (214:214:214))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[17\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1098:1098:1098) (1098:1098:1098))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_comb")
    (INSTANCE ADD_A\[17\]\~feeder)
    (DELAY
      (ABSOLUTE
        (PORT dataf (6527:6527:6527) (6527:6527:6527))
        (IOPATH dataf combout (76:76:76) (76:76:76))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[17\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT datain (222:222:222) (222:222:222))
        (PORT aclr (2138:2138:2138) (2138:2138:2138))
        (PORT ena (7340:7340:7340) (7340:7340:7340))
        (IOPATH (posedge clk) regout (136:136:136) (136:136:136))
        (IOPATH (posedge aclr) regout (305:305:305) (305:305:305))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (130:130:130))
      (SETUP ena (posedge clk) (130:130:130))
      (HOLD datain (posedge clk) (214:214:214))
      (HOLD ena (posedge clk) (214:214:214))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[16\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1056:1056:1056) (1056:1056:1056))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[16\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT adatasdata (7538:7538:7538) (7538:7538:7538))
        (PORT aclr (2138:2138:2138) (2138:2138:2138))
        (PORT ena (7340:7340:7340) (7340:7340:7340))
        (IOPATH (posedge clk) regout (136:136:136) (136:136:136))
        (IOPATH (posedge aclr) regout (305:305:305) (305:305:305))
      )
    )
    (TIMINGCHECK
      (SETUP adatasdata (posedge clk) (130:130:130))
      (SETUP ena (posedge clk) (130:130:130))
      (HOLD adatasdata (posedge clk) (214:214:214))
      (HOLD ena (posedge clk) (214:214:214))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[15\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1108:1108:1108) (1108:1108:1108))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[15\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT adatasdata (7008:7008:7008) (7008:7008:7008))
        (PORT aclr (2138:2138:2138) (2138:2138:2138))
        (PORT ena (7340:7340:7340) (7340:7340:7340))
        (IOPATH (posedge clk) regout (136:136:136) (136:136:136))
        (IOPATH (posedge aclr) regout (305:305:305) (305:305:305))
      )
    )
    (TIMINGCHECK
      (SETUP adatasdata (posedge clk) (130:130:130))
      (SETUP ena (posedge clk) (130:130:130))
      (HOLD adatasdata (posedge clk) (214:214:214))
      (HOLD ena (posedge clk) (214:214:214))
    )
  )
  (CELL
    (CELLTYPE "arriagx_asynch_io")
    (INSTANCE data\[14\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1066:1066:1066) (1066:1066:1066))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_comb")
    (INSTANCE ADD_A\[14\]\~feeder)
    (DELAY
      (ABSOLUTE
        (PORT dataf (6493:6493:6493) (6493:6493:6493))
        (IOPATH dataf combout (76:76:76) (76:76:76))
      )
    )
  )
  (CELL
    (CELLTYPE "arriagx_lcell_ff")
    (INSTANCE ADD_A\[14\])
    (DELAY
      (ABSOLUTE
        (PORT clk (2521:2521:2521) (2521:2521:2521))
        (PORT datain (222:222:222) (222:222:222))