dds_fast.vo

数字信号源

	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.ddioinclk(gnd),
	.dqsupdateen(vcc),
	.linkin(gnd),
	.delayctrlin(6'b000000),
	.offsetctrlin(6'b000000),
	.terminationcontrol(14'b00000000000000),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\we~combout ),
	.regout(),
	.ddioregout(),
	.dqsbusout(),
	.linkout(),
	.padio(we));
// synopsys translate_off
defparam \we~I .ddio_mode = "none";
defparam \we~I .ddioinclk_input = "negated_inclk";
defparam \we~I .dqs_delay_buffer_mode = "none";
defparam \we~I .dqs_out_mode = "none";
defparam \we~I .inclk_input = "normal";
defparam \we~I .input_async_reset = "none";
defparam \we~I .input_power_up = "low";
defparam \we~I .input_register_mode = "none";
defparam \we~I .input_sync_reset = "none";
defparam \we~I .oe_async_reset = "none";
defparam \we~I .oe_power_up = "low";
defparam \we~I .oe_register_mode = "none";
defparam \we~I .oe_sync_reset = "none";
defparam \we~I .operation_mode = "input";
defparam \we~I .output_async_reset = "none";
defparam \we~I .output_power_up = "low";
defparam \we~I .output_register_mode = "none";
defparam \we~I .output_sync_reset = "none";
defparam \we~I .sim_dqs_delay_increment = 0;
defparam \we~I .sim_dqs_intrinsic_delay = 0;
defparam \we~I .sim_dqs_offset_increment = 0;
// synopsys translate_on

// atom is at LCFF_X44_Y19_N27
arriagx_lcell_ff \ADD_A[22] (
	.clk(\clk~clkctrl_outclk ),
	.datain(\ADD_A[22]~feeder_combout ),
	.adatasdata(gnd),
	.aclr(\reset~clkctrl_outclk ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\we~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(ADD_A[22]));

// atom is at PIN_F15
arriagx_io \data[21]~I (
	.datain(gnd),
	.ddiodatain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.ddioinclk(gnd),
	.dqsupdateen(vcc),
	.linkin(gnd),
	.delayctrlin(6'b000000),
	.offsetctrlin(6'b000000),
	.terminationcontrol(14'b00000000000000),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\data~combout [21]),
	.regout(),
	.ddioregout(),
	.dqsbusout(),
	.linkout(),
	.padio(data[21]));
// synopsys translate_off
defparam \data[21]~I .ddio_mode = "none";
defparam \data[21]~I .ddioinclk_input = "negated_inclk";
defparam \data[21]~I .dqs_delay_buffer_mode = "none";
defparam \data[21]~I .dqs_out_mode = "none";
defparam \data[21]~I .inclk_input = "normal";
defparam \data[21]~I .input_async_reset = "none";
defparam \data[21]~I .input_power_up = "low";
defparam \data[21]~I .input_register_mode = "none";
defparam \data[21]~I .input_sync_reset = "none";
defparam \data[21]~I .oe_async_reset = "none";
defparam \data[21]~I .oe_power_up = "low";
defparam \data[21]~I .oe_register_mode = "none";
defparam \data[21]~I .oe_sync_reset = "none";
defparam \data[21]~I .operation_mode = "input";
defparam \data[21]~I .output_async_reset = "none";
defparam \data[21]~I .output_power_up = "low";
defparam \data[21]~I .output_register_mode = "none";
defparam \data[21]~I .output_sync_reset = "none";
defparam \data[21]~I .sim_dqs_delay_increment = 0;
defparam \data[21]~I .sim_dqs_intrinsic_delay = 0;
defparam \data[21]~I .sim_dqs_offset_increment = 0;
// synopsys translate_on

// atom is at LCCOMB_X44_Y19_N4
arriagx_lcell_comb \ADD_A[21]~feeder (
// Equation(s):
// \ADD_A[21]~feeder_combout  = \data~combout [21]

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.datae(vcc),
	.dataf(!\data~combout [21]),
	.datag(vcc),
	.cin(gnd),
	.sharein(gnd),
	.combout(\ADD_A[21]~feeder_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \ADD_A[21]~feeder .extended_lut = "off";
defparam \ADD_A[21]~feeder .lut_mask = 64'h00000000FFFFFFFF;
defparam \ADD_A[21]~feeder .shared_arith = "off";
// synopsys translate_on

// atom is at LCFF_X44_Y19_N5
arriagx_lcell_ff \ADD_A[21] (
	.clk(\clk~clkctrl_outclk ),
	.datain(\ADD_A[21]~feeder_combout ),
	.adatasdata(gnd),
	.aclr(\reset~clkctrl_outclk ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\we~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(ADD_A[21]));

// atom is at PIN_U24
arriagx_io \data[20]~I (
	.datain(gnd),
	.ddiodatain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.ddioinclk(gnd),
	.dqsupdateen(vcc),
	.linkin(gnd),
	.delayctrlin(6'b000000),
	.offsetctrlin(6'b000000),
	.terminationcontrol(14'b00000000000000),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\data~combout [20]),
	.regout(),
	.ddioregout(),
	.dqsbusout(),
	.linkout(),
	.padio(data[20]));
// synopsys translate_off
defparam \data[20]~I .ddio_mode = "none";
defparam \data[20]~I .ddioinclk_input = "negated_inclk";
defparam \data[20]~I .dqs_delay_buffer_mode = "none";
defparam \data[20]~I .dqs_out_mode = "none";
defparam \data[20]~I .inclk_input = "normal";
defparam \data[20]~I .input_async_reset = "none";
defparam \data[20]~I .input_power_up = "low";
defparam \data[20]~I .input_register_mode = "none";
defparam \data[20]~I .input_sync_reset = "none";
defparam \data[20]~I .oe_async_reset = "none";
defparam \data[20]~I .oe_power_up = "low";
defparam \data[20]~I .oe_register_mode = "none";
defparam \data[20]~I .oe_sync_reset = "none";
defparam \data[20]~I .operation_mode = "input";
defparam \data[20]~I .output_async_reset = "none";
defparam \data[20]~I .output_power_up = "low";
defparam \data[20]~I .output_register_mode = "none";
defparam \data[20]~I .output_sync_reset = "none";
defparam \data[20]~I .sim_dqs_delay_increment = 0;
defparam \data[20]~I .sim_dqs_intrinsic_delay = 0;
defparam \data[20]~I .sim_dqs_offset_increment = 0;
// synopsys translate_on

// atom is at LCCOMB_X44_Y19_N6
arriagx_lcell_comb \ADD_A[20]~feeder (
// Equation(s):
// \ADD_A[20]~feeder_combout  = \data~combout [20]

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.datae(vcc),
	.dataf(!\data~combout [20]),
	.datag(vcc),
	.cin(gnd),
	.sharein(gnd),
	.combout(\ADD_A[20]~feeder_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \ADD_A[20]~feeder .extended_lut = "off";
defparam \ADD_A[20]~feeder .lut_mask = 64'h00000000FFFFFFFF;
defparam \ADD_A[20]~feeder .shared_arith = "off";
// synopsys translate_on

// atom is at LCFF_X44_Y19_N7
arriagx_lcell_ff \ADD_A[20] (
	.clk(\clk~clkctrl_outclk ),
	.datain(\ADD_A[20]~feeder_combout ),
	.adatasdata(gnd),
	.aclr(\reset~clkctrl_outclk ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\we~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(ADD_A[20]));

// atom is at PIN_V25
arriagx_io \data[19]~I (
	.datain(gnd),
	.ddiodatain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.ddioinclk(gnd),
	.dqsupdateen(vcc),
	.linkin(gnd),
	.delayctrlin(6'b000000),
	.offsetctrlin(6'b000000),
	.terminationcontrol(14'b00000000000000),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\data~combout [19]),
	.regout(),
	.ddioregout(),
	.dqsbusout(),
	.linkout(),
	.padio(data[19]));
// synopsys translate_off
defparam \data[19]~I .ddio_mode = "none";
defparam \data[19]~I .ddioinclk_input = "negated_inclk";
defparam \data[19]~I .dqs_delay_buffer_mode = "none";
defparam \data[19]~I .dqs_out_mode = "none";
defparam \data[19]~I .inclk_input = "normal";
defparam \data[19]~I .input_async_reset = "none";
defparam \data[19]~I .input_power_up = "low";
defparam \data[19]~I .input_register_mode = "none";
defparam \data[19]~I .input_sync_reset = "none";
defparam \data[19]~I .oe_async_reset = "none";
defparam \data[19]~I .oe_power_up = "low";
defparam \data[19]~I .oe_register_mode = "none";
defparam \data[19]~I .oe_sync_reset = "none";
defparam \data[19]~I .operation_mode = "input";
defparam \data[19]~I .output_async_reset = "none";
defparam \data[19]~I .output_power_up = "low";
defparam \data[19]~I .output_register_mode = "none";
defparam \data[19]~I .output_sync_reset = "none";
defparam \data[19]~I .sim_dqs_delay_increment = 0;
defparam \data[19]~I .sim_dqs_intrinsic_delay = 0;
defparam \data[19]~I .sim_dqs_offset_increment = 0;
// synopsys translate_on

// atom is at LCCOMB_X44_Y19_N8
arriagx_lcell_comb \ADD_A[19]~feeder (
// Equation(s):
// \ADD_A[19]~feeder_combout  = \data~combout [19]

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.datae(vcc),
	.dataf(!\data~combout [19]),
	.datag(vcc),
	.cin(gnd),
	.sharein(gnd),
	.combout(\ADD_A[19]~feeder_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \ADD_A[19]~feeder .extended_lut = "off";
defparam \ADD_A[19]~feeder .lut_mask = 64'h00000000FFFFFFFF;
defparam \ADD_A[19]~feeder .shared_arith = "off";
// synopsys translate_on

// atom is at LCFF_X44_Y19_N9
arriagx_lcell_ff \ADD_A[19] (
	.clk(\clk~clkctrl_outclk ),
	.datain(\ADD_A[19]~feeder_combout ),
	.adatasdata(gnd),
	.aclr(\reset~clkctrl_outclk ),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(\we~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(ADD_A[19]));

// atom is at PIN_AG16
arriagx_io \data[18]~I (
	.datain(gnd),
	.ddiodatain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.ddioinclk(gnd),
	.dqsupdateen(vcc),
	.linkin(gnd),
	.delayctrlin(6'b000000),
	.offsetctrlin(6'b000000),
	.terminationcontrol(14'b00000000000000),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\data~combout [18]),
	.regout(),
	.ddioregout(),
	.dqsbusout(),
	.linkout(),
	.padio(data[18]));
// synopsys translate_off
defparam \data[18]~I .ddio_mode = "none";
defparam \data[18]~I .ddioinclk_input = "negated_inclk";
defparam \data[18]~I .dqs_delay_buffer_mode = "none";
defparam \data[18]~I .dqs_out_mode = "none";
defparam \data[18]~I .inclk_input = "normal";
defparam \data[18]~I .input_async_reset = "none";
defparam \data[18]~I .input_power_up = "low";
defparam \data[18]~I .input_register_mode = "none";
defparam \data[18]~I .input_sync_reset = "none";
defparam \data[18]~I .oe_async_reset = "none";
defparam \data[18]~I .oe_power_up = "low";
defparam \data[18]~I .oe_register_mode = "none";
defparam \data[18]~I .oe_sync_reset = "none";
defparam \data[18]~I .operation_mode = "input";
defparam \data[18]~I .output_async_reset = "none";
defparam \data[18]~I .output_power_up = "low";
defparam \data[18]~I .output_register_mode = "none";
defparam \data[18]~I .output_sync_reset = "none";
defparam \data[18]~I .sim_dqs_delay_increment = 0;
defparam \data[18]~I .sim_dqs_intrinsic_delay = 0;
defparam \data[18]~I .sim_dqs_offset_increment = 0;
// synopsys translate_on

// atom is at LCFF_X44_Y19_N11
arriagx_lcell_ff \ADD_A[18] (
	.clk(\clk~clkctrl_outclk ),
	.datain(gnd),
	.adatasdata(\data~combout [18]),
	.aclr(\reset~clkctrl_outclk ),
	.aload(gnd),
	.sclr(gnd),
	.sload(vcc),
	.ena(\we~combout ),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(ADD_A[18]));

// atom is at PIN_Y27
arriagx_io \data[17]~I (
	.datain(gnd),
	.ddiodatain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.ddioinclk(gnd),
	.dqsupdateen(vcc),
	.linkin(gnd),
	.delayctrlin(6'b000000),
	.offsetctrlin(6'b000000),
	.terminationcontrol(14'b00000000000000),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\data~combout [17]),
	.regout(),
	.ddioregout(),
	.dqsbusout(),
	.linkout(),
	.padio(data[17]));
// synopsys translate_off
defparam \data[17]~I .ddio_mode = "none";
defparam \data[17]~I .ddioinclk_input = "negated_inclk";
defparam \data[17]~I .dqs_delay_buffer_mode = "none";
defparam \data[17]~I .dqs_out_mode = "none";
defparam \data[17]~I .inclk_input = "normal";
defparam \data[17]~I .input_async_reset = "none";
defparam \data[17]~I .input_power_up = "low";
defparam \data[17]~I .input_register_mode = "none";
defparam \data[17]~I .input_sync_reset = "none";
defparam \data[17]~I .oe_async_reset = "none";
defparam \data[17]~I .oe_power_up = "low";
defparam \data[17]~I .oe_register_mode = "none";
defparam \data[17]~I .oe_sync_reset = "none";