cordic.map.summary

来自「cordic算法的fpga的实现 采用altera芯片」· SUMMARY 代码 · 共 18 行

Analysis & Synthesis Status : Successful - Wed Nov 12 10:12:18 2008
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Web Edition
Revision Name : cordic
Top-level Entity Name : cordic
Family : Arria GX
Logic utilization : N/A
    Combinational ALUTs : 135
    Dedicated logic registers : 156
Total registers : 156
Total pins : 35
Total virtual pins : 0
Total block memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0
Total GXB Receiver Channels : 0
Total GXB Transmitter Channels : 0