run.do

开源软核处理器OpenRisc的SOPC设计

vlog -reportprogress 300 -work work {../../../rtl/verilog/timescale.v}
vlog -reportprogress 300 -work work {../../../rtl/verilog/wb_conbusex_top.v}
vlog -reportprogress 300 -work work {../../../rtl/verilog/wb_conbus_arb.v}
vlog -reportprogress 300 -work work {../../../bench/verilog/wb_slv_model.v}
vlog -reportprogress 300 -work work {../../../bench/verilog/wb_mast_model.v}
vlog -reportprogress 300 -work work {../../../bench/verilog/wb_conbusex_top_bench.v}

vsim work.wb_conbusex_top_bench
do ./wave.do
run -all