alt_sync_fifo_vhm.tdf

来自「多功能卡的源代码」· TDF 代码 · 共 117 行

--alt_sync_fifo DEVICE_FAMILY="Cyclone" LPM_NUMWORDS=2048 LPM_SHOWAHEAD="OFF" LPM_WIDTH=16 LPM_WIDTHU=11 OVERFLOW_CHECKING="ON" UNDERFLOW_CHECKING="ON" USE_EAB="ON" aclr data q rdclk rdempty rdfull rdreq rdusedw wrclk wrempty wrfull wrreq wrusedw
--VERSION_BEGIN 8.0 cbx_a_gray2bin 2008:02:23:252825 cbx_a_graycounter 2008:02:23:252825 cbx_altdpram 2008:03:07:257777 cbx_altsyncram 2008:03:26:267331 cbx_cycloneii 2008:02:23:252825 cbx_dcfifo 2008:04:22:277785 cbx_fifo_common 2008:02:23:252825 cbx_flex10ke 2008:02:23:252825 cbx_lpm_add_sub 2008:03:09:257947 cbx_lpm_compare 2008:02:23:252825 cbx_lpm_counter 2008:02:23:252825 cbx_lpm_decode 2008:02:23:252825 cbx_lpm_mux 2008:02:23:252825 cbx_mgl 2008:04:11:273944 cbx_scfifo 2008:02:23:252825 cbx_stratix 2008:02:23:252825 cbx_stratixii 2008:02:23:252825 cbx_stratixiii 2008:04:23:278548 cbx_util_mgl 2008:04:15:275689  VERSION_END


-- Copyright (C) 1991-2008 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.


FUNCTION dpram_75v (data[15..0], inclock, outclock, outclocken, rdaddress[10..0], wraddress[10..0], wren)
RETURNS ( q[15..0]);
FUNCTION carry_sum (cin, sin)
RETURNS ( cout, sout);
FUNCTION add_sub_5g8 (dataa[10..0], datab[10..0])
RETURNS ( cout, result[10..0]);
FUNCTION add_sub_b18 (dataa[11..0], datab[11..0])
RETURNS ( result[11..0]);
FUNCTION cntr_mua (aclr, clock, cnt_en)
RETURNS ( q[11..0]);

--synthesis_resources = lut 87 M4K 8 
SUBDESIGN alt_sync_fifo_vhm
( 
	aclr	:	input;
	data[15..0]	:	input;
	q[15..0]	:	output;
	rdclk	:	input;
	rdempty	:	output;
	rdfull	:	output;
	rdreq	:	input;
	rdusedw[10..0]	:	output;
	wrclk	:	input;
	wrempty	:	output;
	wrfull	:	output;
	wrreq	:	input;
	wrusedw[10..0]	:	output;
) 
VARIABLE 
	dpram4 : dpram_75v;
	cs10a[1..0] : carry_sum;
	cs11a[11..0] : carry_sum;
	cs12a[11..0] : carry_sum;
	cs13 : carry_sum;
	cs6a[11..0] : carry_sum;
	dffe5a[11..0] : dffe;
	dffe7a[11..0] : dffe;
	dffe8a[11..0] : dffe;
	dffe9a[11..0] : dffe;
	add_sub2 : add_sub_5g8;
	add_sub3 : add_sub_b18;
	cntr1 : cntr_mua;
	fast_feed_read	: WIRE;
	read_count_actual[11..0]	: WIRE;
	read_delay_stratix[11..0]	: WIRE;
	w1w	: WIRE;

BEGIN 
	dpram4.data[] = data[];
	dpram4.inclock = wrclk;
	dpram4.outclock = rdclk;
	dpram4.outclocken = cs13.sout;
	dpram4.rdaddress[10..0] = read_count_actual[10..0];
	dpram4.wraddress[10..0] = cntr1.q[10..0];
	dpram4.wren = cs10a[1..1].sout;
	cs10a[].cin = ( ((! cs10a[0..0].cout) & wrreq), ((! (cntr1.q[11..11] $ dffe9a[11..11].q)) $ add_sub2.cout));
	cs10a[].sin = ( ((! cs10a[0..0].cout) & wrreq), ((! (cntr1.q[11..11] $ dffe9a[11..11].q)) $ add_sub2.cout));
	cs11a[].cin = ( ((! (cntr1.q[11..1] $ dffe9a[11..1].q)) & cs11a[10..0].cout), (! (cntr1.q[0..0] $ dffe9a[0..0].q)));
	cs11a[].sin = ( ((! (cntr1.q[11..1] $ dffe9a[11..1].q)) & cs11a[10..0].cout), (! (cntr1.q[0..0] $ dffe9a[0..0].q)));
	cs12a[].cin = ( ((! (dffe8a[11..1].q $ read_delay_stratix[11..1])) & cs12a[10..0].cout), (! (dffe8a[0..0].q $ read_delay_stratix[0..0])));
	cs12a[].sin = ( ((! (dffe8a[11..1].q $ read_delay_stratix[11..1])) & cs12a[10..0].cout), (! (dffe8a[0..0].q $ read_delay_stratix[0..0])));
	cs13.cin = ((! cs12a[11..11].cout) & rdreq);
	cs13.sin = ((! cs12a[11..11].cout) & rdreq);
	cs6a[].cin = ( (read_count_actual[11..1] & cs6a[10..0].cout), (fast_feed_read & read_count_actual[0..0]));
	cs6a[].sin = ( (read_count_actual[11..1] $ cs6a[10..0].cout), (fast_feed_read $ read_count_actual[0..0]));
	dffe5a[].clk = rdclk;
	dffe5a[].clrn = (! aclr);
	dffe5a[].d = cs6a[].sout;
	dffe7a[].clk = wrclk;
	dffe7a[].clrn = (! aclr);
	dffe7a[].d = cntr1.q[];
	dffe8a[].clk = rdclk;
	dffe8a[].clrn = (! aclr);
	dffe8a[].d = dffe7a[].q;
	dffe9a[].clk = wrclk;
	dffe9a[].clrn = (! aclr);
	dffe9a[].d = read_delay_stratix[];
	add_sub2.dataa[10..0] = cntr1.q[10..0];
	add_sub2.datab[10..0] = dffe9a[10..0].q;
	add_sub3.dataa[] = dffe8a[].q;
	add_sub3.datab[] = read_delay_stratix[];
	cntr1.aclr = aclr;
	cntr1.clock = wrclk;
	cntr1.cnt_en = w1w;
	fast_feed_read = cs13.cout;
	q[] = dpram4.q[];
	rdempty = cs12a[11..11].sout;
	rdfull = add_sub3.result[11..11];
	rdusedw[10..0] = add_sub3.result[10..0];
	read_count_actual[] = dffe5a[].q;
	read_delay_stratix[] = read_count_actual[];
	w1w = cs10a[1..1].sout;
	wrempty = cs11a[11..11].sout;
	wrfull = cs10a[0..0].sout;
	wrusedw[10..0] = add_sub2.result[10..0];
END;
--VALID FILE