ad_test.tan.qmsg

多功能卡的源代码

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "17 " "Warning: Found 17 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "_232_to_fifo:inst5\|lt_uart_r5:inst6\|wrn " "Info: Detected ripple clock \"_232_to_fifo:inst5\|lt_uart_r5:inst6\|wrn\" as buffer" {  } { { "lt_uart_r5.v" "" { Text "C:/Users/liutong/Desktop/CPCI/lt_uart_r5.v" 8 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "_232_to_fifo:inst5\|lt_uart_r5:inst6\|wrn" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "adt7301_fifo:inst26\|ad7301_controller:inst6\|fifo_write " "Info: Detected ripple clock \"adt7301_fifo:inst26\|ad7301_controller:inst6\|fifo_write\" as buffer" {  } { { "ad7301_controller.v" "" { Text "C:/Users/liutong/Desktop/CPCI/ad7301_controller.v" 22 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "adt7301_fifo:inst26\|ad7301_controller:inst6\|fifo_write" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "ad7864_fifo:inst7\|ad7864_controller:inst4\|fifo_write " "Info: Detected ripple clock \"ad7864_fifo:inst7\|ad7864_controller:inst4\|fifo_write\" as buffer" {  } { { "ad7864_controller.v" "" { Text "C:/Users/liutong/Desktop/CPCI/ad7864_controller.v" 30 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "ad7864_fifo:inst7\|ad7864_controller:inst4\|fifo_write" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "_422_to_fifo3:inst21\|_422_receiver_2:inst\|wrn " "Info: Detected ripple clock \"_422_to_fifo3:inst21\|_422_receiver_2:inst\|wrn\" as buffer" {  } { { "_422_receiver_2.v" "" { Text "C:/Users/liutong/Desktop/CPCI/_422_receiver_2.v" 11 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "_422_to_fifo3:inst21\|_422_receiver_2:inst\|wrn" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "_422_to_fifo2:inst20\|_422_receiver_2:inst\|wrn " "Info: Detected ripple clock \"_422_to_fifo2:inst20\|_422_receiver_2:inst\|wrn\" as buffer" {  } { { "_422_receiver_2.v" "" { Text "C:/Users/liutong/Desktop/CPCI/_422_receiver_2.v" 11 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "_422_to_fifo2:inst20\|_422_receiver_2:inst\|wrn" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "_422_to_fifo1:inst8\|_422_receiver_2:inst\|wrn " "Info: Detected ripple clock \"_422_to_fifo1:inst8\|_422_receiver_2:inst\|wrn\" as buffer" {  } { { "_422_receiver_2.v" "" { Text "C:/Users/liutong/Desktop/CPCI/_422_receiver_2.v" 11 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "_422_to_fifo1:inst8\|_422_receiver_2:inst\|wrn" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "_422_to_fifo4:inst22\|_422_receiver_2:inst\|wrn " "Info: Detected ripple clock \"_422_to_fifo4:inst22\|_422_receiver_2:inst\|wrn\" as buffer" {  } { { "_422_receiver_2.v" "" { Text "C:/Users/liutong/Desktop/CPCI/_422_receiver_2.v" 11 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "_422_to_fifo4:inst22\|_422_receiver_2:inst\|wrn" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "core1:inst23\|read_bkfifo " "Info: Detected ripple clock \"core1:inst23\|read_bkfifo\" as buffer" {  } { { "core1.v" "" { Text "C:/Users/liutong/Desktop/CPCI/core1.v" 168 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "core1:inst23\|read_bkfifo" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_GATED_CLK" "dma:inst6\|WideOr2~14 " "Info: Detected gated clock \"dma:inst6\|WideOr2~14\" as buffer" {  } { { "dma.v" "" { Text "C:/Users/liutong/Desktop/CPCI/dma.v" 166 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "dma:inst6\|WideOr2~14" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "dma:inst6\|currentstate.s5 " "Info: Detected ripple clock \"dma:inst6\|currentstate.s5\" as buffer" {  } { { "dma.v" "" { Text "C:/Users/liutong/Desktop/CPCI/dma.v" 117 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "dma:inst6\|currentstate.s5" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "dma:inst6\|currentstate.s4 " "Info: Detected ripple clock \"dma:inst6\|currentstate.s4\" as buffer" {  } { { "dma.v" "" { Text "C:/Users/liutong/Desktop/CPCI/dma.v" 117 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "dma:inst6\|currentstate.s4" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "dma:inst6\|currentstate.s2 " "Info: Detected ripple clock \"dma:inst6\|currentstate.s2\" as buffer" {  } { { "dma.v" "" { Text "C:/Users/liutong/Desktop/CPCI/dma.v" 117 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "dma:inst6\|currentstate.s2" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "_232_to_fifo:inst5\|clk_txd:inst1\|clk16x_mid\[1\] " "Info: Detected ripple clock \"_232_to_fifo:inst5\|clk_txd:inst1\|clk16x_mid\[1\]\" as buffer" {  } { { "clk_txd.v" "" { Text "C:/Users/liutong/Desktop/CPCI/clk_txd.v" 41 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "_232_to_fifo:inst5\|clk_txd:inst1\|clk16x_mid\[1\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "_232_to_fifo:inst5\|clk_txd:inst1\|clk16x_mid\[0\] " "Info: Detected ripple clock \"_232_to_fifo:inst5\|clk_txd:inst1\|clk16x_mid\[0\]\" as buffer" {  } { { "clk_txd.v" "" { Text "C:/Users/liutong/Desktop/CPCI/clk_txd.v" 41 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "_232_to_fifo:inst5\|clk_txd:inst1\|clk16x_mid\[0\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_RIPPLE_CLK" "inst12 " "Info: Detected ripple clock \"inst12\" as buffer" {  } { { "CPCI_exp.bdf" "" { Schematic "C:/Users/liutong/Desktop/CPCI/CPCI_exp.bdf" { { 744 -544 -480 824 "inst12" "" } } } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "inst12" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_GATED_CLK" "_232_to_fifo:inst5\|clk_txd:inst1\|clk16x " "Info: Detected gated clock \"_232_to_fifo:inst5\|clk_txd:inst1\|clk16x\" as buffer" {  } { { "clk_txd.v" "" { Text "C:/Users/liutong/Desktop/CPCI/clk_txd.v" 7 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "_232_to_fifo:inst5\|clk_txd:inst1\|clk16x" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0 0} { "Info" "ITAN_GATED_CLK" "dma:inst6\|reset_by_hand_~43 " "Info: Detected gated clock \"dma:inst6\|reset_by_hand_~43\" as buffer" {  } { { "dma.v" "" { Text "C:/Users/liutong/Desktop/CPCI/dma.v" 56 -1 0 } } { "d:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "dma:inst6\|reset_by_hand_~43" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0 "" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0 0}
{ "Info" "ITAN_SLACK_ANALYSIS" "" "Info: Found timing assignments -- calculating delays" {  } {  } 0 0 "Found timing assignments -- calculating delays" 0 0 "" 0 0}