📄 alt_sync_fifo_pqm.tdf
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--alt_sync_fifo DEVICE_FAMILY="Cyclone" LPM_NUMWORDS=2048 LPM_SHOWAHEAD="OFF" LPM_WIDTH=16 LPM_WIDTHU=11 OVERFLOW_CHECKING="OFF" UNDERFLOW_CHECKING="OFF" USE_EAB="OFF" aclr data q rdclk rdempty rdfull rdreq rdusedw wrclk wrempty wrfull wrreq wrusedw
--VERSION_BEGIN 8.0 cbx_a_gray2bin 2008:02:23:252825 cbx_a_graycounter 2008:02:23:252825 cbx_altdpram 2008:03:07:257777 cbx_altsyncram 2008:03:26:267331 cbx_cycloneii 2008:02:23:252825 cbx_dcfifo 2008:04:22:277785 cbx_fifo_common 2008:02:23:252825 cbx_flex10ke 2008:02:23:252825 cbx_lpm_add_sub 2008:03:09:257947 cbx_lpm_compare 2008:02:23:252825 cbx_lpm_counter 2008:02:23:252825 cbx_lpm_decode 2008:02:23:252825 cbx_lpm_mux 2008:02:23:252825 cbx_mgl 2008:04:11:273944 cbx_scfifo 2008:02:23:252825 cbx_stratix 2008:02:23:252825 cbx_stratixii 2008:02:23:252825 cbx_stratixiii 2008:04:23:278548 cbx_util_mgl 2008:04:15:275689 VERSION_END
-- Copyright (C) 1991-2008 Altera Corporation
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-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
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-- to the terms and conditions of the Altera Program License
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-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
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-- applicable agreement for further details.
FUNCTION altdpram (aclr, byteena[WIDTH_BYTEENA-1..0], data[WIDTH-1..0], inclock, inclocken, outclock, outclocken, rdaddress[WIDTHAD-1..0], rdaddressstall, rden, wraddress[WIDTHAD-1..0], wraddressstall, wren)
WITH ( BYTE_SIZE, INDATA_ACLR, INDATA_REG, LPM_FILE, lpm_hint, MAXIMUM_DEPTH, NUMWORDS, OUTDATA_ACLR, OUTDATA_REG, RAM_BLOCK_TYPE, RDADDRESS_ACLR, RDADDRESS_REG, RDCONTROL_ACLR, RDCONTROL_REG, READ_DURING_WRITE_MODE_MIXED_PORTS, USE_EAB, WIDTH, WIDTH_BYTEENA = 1, WIDTHAD, WRADDRESS_ACLR, WRADDRESS_REG, WRCONTROL_ACLR, WRCONTROL_REG)
RETURNS ( q[WIDTH-1..0]);
FUNCTION carry_sum (cin, sin)
RETURNS ( cout, sout);
FUNCTION add_sub_5g8 (dataa[10..0], datab[10..0])
RETURNS ( cout, result[10..0]);
FUNCTION add_sub_b18 (dataa[11..0], datab[11..0])
RETURNS ( result[11..0]);
FUNCTION cntr_mua (aclr, clock, cnt_en)
RETURNS ( q[11..0]);
--synthesis_resources = altdpram 1 lut 133
SUBDESIGN alt_sync_fifo_pqm
(
aclr : input;
data[15..0] : input;
q[15..0] : output;
rdclk : input;
rdempty : output;
rdfull : output;
rdreq : input;
rdusedw[10..0] : output;
wrclk : input;
wrempty : output;
wrfull : output;
wrreq : input;
wrusedw[10..0] : output;
)
VARIABLE
dpram4 : altdpram
WITH (
OUTDATA_REG = "OUTCLOCK",
RDCONTROL_ACLR = "OFF",
RDCONTROL_REG = "UNREGISTERED",
USE_EAB = "OFF",
WIDTH = 16,
WIDTHAD = 11
);
cs11a[1..0] : carry_sum;
cs12a[11..0] : carry_sum;
cs13a[11..0] : carry_sum;
cs6a[11..0] : carry_sum;
dffe10a[11..0] : dffe;
dffe5a[11..0] : dffe;
dffe7a[11..0] : dffe;
dffe8a[11..0] : dffe;
dffe9a[11..0] : dffe;
add_sub2 : add_sub_5g8;
add_sub3 : add_sub_b18;
cntr1 : cntr_mua;
fast_feed_read : WIRE;
one[11..0] : WIRE;
read_count_actual[11..0] : WIRE;
BEGIN
dpram4.aclr = aclr;
dpram4.data[] = data[];
dpram4.inclock = wrclk;
dpram4.outclock = rdclk;
dpram4.outclocken = rdreq;
dpram4.rdaddress[10..0] = read_count_actual[10..0];
dpram4.wraddress[10..0] = cntr1.q[10..0];
dpram4.wren = wrreq;
cs11a[].cin = ( ((! cs11a[0..0].cout) & wrreq), ((! (cntr1.q[11..11] $ dffe10a[11..11].q)) $ add_sub2.cout));
cs11a[].sin = ( ((! cs11a[0..0].cout) & wrreq), ((! (cntr1.q[11..11] $ dffe10a[11..11].q)) $ add_sub2.cout));
cs12a[].cin = ( ((! (cntr1.q[11..1] $ dffe10a[11..1].q)) & cs12a[10..0].cout), (! (cntr1.q[0..0] $ dffe10a[0..0].q)));
cs12a[].sin = ( ((! (cntr1.q[11..1] $ dffe10a[11..1].q)) & cs12a[10..0].cout), (! (cntr1.q[0..0] $ dffe10a[0..0].q)));
cs13a[].cin = ( ((! (dffe9a[11..1].q $ dffe7a[11..1].q)) & cs13a[10..0].cout), (! (dffe9a[0..0].q $ dffe7a[0..0].q)));
cs13a[].sin = ( ((! (dffe9a[11..1].q $ dffe7a[11..1].q)) & cs13a[10..0].cout), (! (dffe9a[0..0].q $ dffe7a[0..0].q)));
cs6a[].cin = ( (read_count_actual[11..1] & cs6a[10..0].cout), (fast_feed_read & read_count_actual[0..0]));
cs6a[].sin = ( (read_count_actual[11..1] $ cs6a[10..0].cout), (fast_feed_read $ read_count_actual[0..0]));
dffe10a[].clk = wrclk;
dffe10a[].clrn = (! aclr);
dffe10a[].d = dffe7a[].q;
dffe5a[].clk = rdclk;
dffe5a[].clrn = (! aclr);
dffe5a[].d = (cs6a[].sout $ one[]);
dffe7a[].clk = rdclk;
dffe7a[].clrn = (! aclr);
dffe7a[].d = read_count_actual[];
dffe7a[].ena = rdreq;
dffe8a[].clk = wrclk;
dffe8a[].clrn = (! aclr);
dffe8a[].d = cntr1.q[];
dffe9a[].clk = rdclk;
dffe9a[].clrn = (! aclr);
dffe9a[].d = dffe8a[].q;
add_sub2.dataa[10..0] = cntr1.q[10..0];
add_sub2.datab[10..0] = dffe10a[10..0].q;
add_sub3.dataa[] = dffe9a[].q;
add_sub3.datab[] = dffe7a[].q;
cntr1.aclr = aclr;
cntr1.clock = wrclk;
cntr1.cnt_en = wrreq;
fast_feed_read = rdreq;
one[] = B"000000000001";
q[] = dpram4.q[];
rdempty = cs13a[11..11].sout;
rdfull = add_sub3.result[11..11];
rdusedw[10..0] = add_sub3.result[10..0];
read_count_actual[] = (dffe5a[].q $ one[]);
wrempty = cs12a[11..11].sout;
wrfull = cs11a[0..0].sout;
wrusedw[10..0] = add_sub2.result[10..0];
END;
--VALID FILE
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