rec_work.v

RAM控制的VHDL实现 真的很有用真的很有用

module rec_work(clk,board_address,data,address,wren,dricp,drien,T_temp_50,
T_temp_K0,T_temp_K,f_L_N,f_H_N0,N0,n0,n1,n2,n3,n4,n5,n6,n7,mode,
ram_data,ram_address,ram_wren,lvpixel,t_after_reset,t_before_scan,
t_after_scan);

input clk;//4M clock input;
input [3:0]	board_address;//driver board address in the line;
input [3:0]	data;//4bits data input;
input [3:0]	address;//4bits address input;
input wren;//write enable signal input;

output dricp;//driver_wav start work signal output;
output drien;//driver_wav enable signal output;
output [17:0]	T_temp_50;//50Hz;
output [17:0]	T_temp_K0;//50Hz or (1-10)KHz , which is used to produce initial wave(2 choices);
output [7:0]	f_L_N;//number of low frequency wave;
output [15:0]	f_H_N0;//number of high frequency wave,used for initialization;
output	[3:0]	N0;//total number of low and high frequency in initialing;

output [10:0]	T_temp_K;//(1-10)KHz;
output [15:0]	n0;//number of high frequency wave to produce gray level 0;
output [15:0]	n1;//number of high frequency wave to produce gray level 1;
output [15:0]	n2;//number of high frequency wave to produce gray level 2;
output [15:0]	n3;//number of high frequency wave to produce gray level 3;
output [15:0]	n4;//number of high frequency wave to produce gray level 4;
output [15:0]	n5;//number of high frequency wave to produce gray level 5;
output [15:0]	n6;//number of high frequency wave to produce gray level 6;
output [15:0]	n7;//number of high frequency wave to produce gray level 7;

output [3:0]	mode;//mode(5 choices);
output [7:0]	t_after_reset;
output [7:0]	t_before_scan;
output [7:0]	t_after_scan;
output [3:0]	ram_data;
output [13:0]	ram_address;
output 			ram_wren;
output	[3:0]		lvpixel;

reg drien;
reg dricp;
reg [17:0]	T_temp_50;//50Hz;
reg [17:0]	T_temp_K0;//50Hz or (1-10)KHz , which is used to produce initial wave(2 choices);
reg [15:0]	f_L_N;//number of low frequency wave;
reg [15:0]	f_H_N0;//number of high frequency wave,used for initialization;
reg	[3:0]	N0;//total number of low and high frequency in initialing;

reg [10:0]	T_temp_K;//(1-10)KHz;

reg [15:0]	n0;//number of high frequency wave to produce gray level 0;
reg [15:0]	n1;//number of high frequency wave to produce gray level 1;
reg [15:0]	n2;//number of high frequency wave to produce gray level 2;
reg [15:0]	n3;//number of high frequency wave to produce gray level 3;
reg [15:0]	n4;//number of high frequency wave to produce gray level 4;
reg [15:0]	n5;//number of high frequency wave to produce gray level 5;
reg [15:0]	n6;//number of high frequency wave to produce gray level 6;
reg [15:0]	n7;//number of high frequency wave to produce gray level 7;

reg [3:0]	mode;//mode(5 choices);
reg [7:0]	t_after_reset;
reg [7:0]	t_before_scan;
reg [7:0]	t_after_scan;
reg [3:0]	ram_data;
reg [13:0]	ram_address;
reg			ram_wren;
reg	[3:0]	lvpixel;

reg [3:0]	f_H_0;
reg [3:0]	f_H_1;

reg [3:0]	state;
reg	[3:0]	data_temp0;
reg	[3:0]	data_temp1;
reg	[3:0]	data_temp2;
reg	[3:0]	data_temp3;
reg	[3:0]	data_temp4;
reg	[3:0]	data_temp5;
reg	[3:0]	data_temp6;

//resolution[13:7] is the number of lines on the pannel;
//resolution[6:0] is the number of pixels per line;
reg [13:0]	resolution;

reg	[7:0]	inner_count;
reg	[15:0]	t0;


parameter	head = 32'h9669aa55;
parameter   paddress  	= 4'h1;
parameter   gaddress	= 4'h2;
parameter	saddress	= 4'h3;


parameter   start 		= 4'h0;
parameter	pgadd		= 4'h1;
parameter	para_data	= 4'h2;
parameter	gray_data	= 4'h3;
parameter	work_mode	= 4'h4;

always @(posedge clk)
begin
	case(lvpixel)
	4'h1:	resolution <= 14'b11111111111111;//128*128;
	4'h2:	resolution <= 14'b10111111011111;//96*96;
	default:resolution <= 14'b01111110111111;//64*64;
	endcase
end

always @(posedge clk)
begin
	case(f_H_0)
// 1k-10k high frequency wave;
	4'h1:T_temp_K0 <= 1914;
	4'h2:T_temp_K0 <= 914;
	4'h3:T_temp_K0 <= 581;
	4'h4:T_temp_K0 <= 414;
	4'h5:T_temp_K0 <= 314;	
	4'h6:T_temp_K0 <= 247;
	4'h7:T_temp_K0 <= 200;
	4'h8:T_temp_K0 <= 164;
	4'h9:T_temp_K0 <= 136;
	4'ha:T_temp_K0 <= 114;
//50Hz low frequency wave;
	default:T_temp_K0 <= 39594;	
	endcase
//50Hz low frequency wave;	
	T_temp_50 <= 39594;
	
// 1k-10k high frequency wave;	
	case(f_H_1)
	4'h1:T_temp_K <= 1914;
	4'h2:T_temp_K <= 914;
	4'h3:T_temp_K <= 581;
	4'h4:T_temp_K <= 414;
	4'h5:T_temp_K <= 314;	
	4'h6:T_temp_K <= 0;
	4'h7:T_temp_K <= 0;
	4'h8:T_temp_K <= 0;
	4'h9:T_temp_K <= 0;
	default:T_temp_K <= 0;
	endcase
end


always @(posedge clk)
begin
	case(state)
	start:begin
		dricp <= 1'b0;
		ram_wren <= 1'b0;
		if(wren)begin
			if(address==board_address)begin
				data_temp0 <= data;
				data_temp1 <= data_temp0;
				data_temp2 <= data_temp1;
				data_temp3 <= data_temp2;
				data_temp4 <= data_temp3;
				data_temp5 <= data_temp4;
				data_temp6 <= data_temp5;
				if({data_temp6,data_temp5,data_temp4,
					data_temp3,data_temp2,data_temp1,data_temp0,data}== head)
					state <= pgadd;
			end
			else
				state <= start;
		end
		else
			state <= start;


		end
	pgadd:begin
		if(wren)begin
			if(address==board_address)begin				
				case(data)
				paddress:begin
					state <= para_data;
					inner_count <= 8'h00;
					end
				gaddress:begin
					state <= gray_data;
					ram_address <= 14'h0000;
					ram_wren <= 1'b0;
					end
				saddress:begin
					state <= work_mode;
					drien <= 1;
					end
				default: state <= start;
				endcase
			end
			else
				state <= pgadd;
		end
		else
			state <= pgadd;
		end
	para_data:begin
		if(wren)begin
			if(address == board_address)begin
				case(inner_count)
//recieve the parameter f_L_N[7:0],[1-255];
				8'h00:begin
					f_L_N[7:4] <= data;
					inner_count <= 8'h01;
					end
				8'h01:begin
					f_L_N[3:0] <= data;
					inner_count <= 8'h02;
					end
//recieve the parameter t0[15:0];				
				8'h02:begin
					t0[15:12] <= data;
					inner_count <= 8'h03;
					end
				8'h03:begin
					t0[11:8] <= data;
					inner_count <= 8'h04;
					end
				8'h04:begin
					t0[7:4] <= data;
					inner_count <= 8'h05;
					end
				8'h05:begin
					t0[3:0] <= data;
					inner_count <= 8'h06;
					end
//recieve the parameter N0[3:0];
				8'h06:begin
					N0[3:0] <= data;
					inner_count <= 8'h07;
					end
//recieve the parameter f_H_0[3:0];
				8'h07:begin
					f_H_0[3:0] <= data;
					inner_count <= 8'h08;
					end
//recieve the parameter f_H_N0[15:0];				
				8'h08:begin
					f_H_N0[15:12] <= data;
					inner_count <= 8'h09;
					end
				8'h09:begin
					f_H_N0[11:8] <= data;
					inner_count <= 8'h0a;
					end
				8'h0a:begin
					f_H_N0[7:4] <= data;
					inner_count <= 8'h0b;
					end
				8'h0b:begin
					f_H_N0[3:0] <= data;
					inner_count <= 8'h0c;
					end
//recieve the parameter f_H_1[3:0];				
				8'h0c:begin
					f_H_1[3:0] <= data;
					inner_count <= 8'h0d;
					end
//recieve the parameter t_after_reset[7:0];
				8'h0d:begin
					t_after_reset[7:4] <= data;
					inner_count <= 8'h0e;
					end
				8'h0e:begin
					t_after_reset[3:0] <= data;
					inner_count <= 8'h0f;
					end
//recieve the parameter t_before_scan[7:0];[0s-60s]
				8'h0f:begin
					t_before_scan[7:4] <= data;
					inner_count <= 8'h10;
					end
				8'h10:begin
					t_before_scan[3:0] <= data;
					inner_count <= 8'h11;
					end
//recieve the parameter t_after_scan[7:0];	[0s-60s]			
				8'h11:begin
					t_after_scan[7:4] <= data;
					inner_count <= 8'h12;
					end
				8'h12:begin
					t_after_scan[3:0] <= data;
					inner_count <= 8'h13;
					end
//recieve the parameter n0[15:0];
				8'h13:begin
					n0[15:12] <= data;
					inner_count <= 8'h14;
					end
				8'h14:begin
					n0[11:8] <= data;
					inner_count <= 8'h15;
					end
				8'h15:begin
					n0[7:4] <= data;
					inner_count <= 8'h16;
					end
				8'h16:begin
					n0[3:0] <= data;
					inner_count <= 8'h17;
					end
//recieve the parameter n1[15:0];
				8'h17:begin
					n1[15:12] <= data;
					inner_count <= 8'h18;
					end
				8'h18:begin
					n1[11:8] <= data;
					inner_count <= 8'h19;
					end
				8'h1a:begin
					n1[7:4] <= data;
					inner_count <= 8'h1b;
					end
				8'h1b:begin
					n1[3:0] <= data;
					inner_count <= 8'h1c;
					end
//recieve the parameter n2[15:0];
				8'h1c:begin
					n2[15:12] <= data;
					inner_count <= 8'h1d;
					end
				8'h1d:begin
					n2[11:8] <= data;
					inner_count <= 8'h1e;
					end
				8'h1e:begin
					n2[7:4] <= data;
					inner_count <= 8'h1f;
					end
				8'h1f:begin
					n2[3:0] <= data;
					inner_count <= 8'h20;
					end
//recieve the parameter n3[15:0];
				8'h20:begin
					n3[15:12] <= data;
					inner_count <= 8'h21;
					end
				8'h21:begin
					n3[11:8] <= data;
					inner_count <= 8'h22;
					end
				8'h22:begin
					n3[7:4] <= data;
					inner_count <= 8'h23;
					end
				8'h23:begin
					n3[3:0] <= data;
					inner_count <= 8'h24;
					end
//recieve the parameter n4[15:0];
				8'h24:begin
					n4[15:12] <= data;
					inner_count <= 8'h25;
					end
				8'h25:begin
					n4[11:8] <= data;
					inner_count <= 8'h26;
					end
				8'h26:begin
					n4[7:4] <= data;
					inner_count <= 8'h27;
					end
				8'h27:begin
					n4[3:0] <= data;
					inner_count <= 8'h28;
					end
//recieve the parameter n5[15:0];
				8'h28:begin
					n5[15:12] <= data;
					inner_count <= 8'h29;
					end
				8'h29:begin
					n5[11:8] <= data;
					inner_count <= 8'h2a;
					end
				8'h2a:begin
					n5[7:4] <= data;
					inner_count <= 8'h2b;
					end
				8'h2b:begin
					n5[3:0] <= data;
					inner_count <= 8'h2c;
					end
//recieve the parameter n6[15:0];
				8'h2c:begin
					n6[15:12] <= data;
					inner_count <= 8'h2d;
					end
				8'h2d:begin
					n6[11:8] <= data;
					inner_count <= 8'h2e;
					end
				8'h2e:begin
					n6[7:4] <= data;
					inner_count <= 8'h2f;
					end
				8'h2f:begin
					n6[3:0] <= data;
					inner_count <= 8'h30;
					end
//recieve the parameter n7[15:0];
				8'h30:begin
					n7[15:12] <= data;
					inner_count <= 8'h31;
					end
				8'h31:begin
					n7[11:8] <= data;
					inner_count <= 8'h32;
					end
				8'h32:begin
					n7[7:4] <= data;
					inner_count <= 8'h33;
					end
				8'h33:begin
					n7[3:0] <= data;
					inner_count <= 8'h34;
					end
//recieve the parameter lvpixel[3:0];
				8'h34:begin
					lvpixel[3:0] <= data;
					inner_count <= 8'h00;
					state <= start;
					end					
				endcase
			end
			else
				state <= para_data;
		end
		else
			state <= para_data;
		end
	gray_data:begin
		if(wren)begin
			if(address==board_address)begin
				ram_wren <= 1'b1;
				ram_data <= data;
				if(ram_address == resolution)
					state <= start;
				else
					state <= gray_data;

				if(ram_address[6:0] == 7'h3f)begin
					ram_address[6:0] <= 7'h00;
					ram_address[13:7] <= ram_address[13:7] + 7'h01;
					end
				else
					ram_address <= ram_address + 14'h0001;
			end
			else
				state <= gray_data;
		end
		else
		begin
			ram_wren <= 1'b0;
			state <= gray_data;
		end
		end
	work_mode:begin
		if(wren)begin
			if(address == board_address)begin
				mode <= data;
				case(data)
				4'h8: dricp <= 1'b1;//state <= mode_clear;		
				4'h9: dricp <= 1'b1;//state <= mode_matte;
				4'ha: dricp <= 1'b1;//state <= mode_image;
				4'hb: drien <= 1'b0;//state <= mode_image_pause;
				4'hc: dricp <= 1'b1;//state <= mode_checkerboard;
				4'hd: dricp <= 1'b1;//state <= mode_init;
				default:begin
					state <= start;
					dricp <= 1'b0;
					end
				endcase
			end
			else
				state <= work_mode;
		end
		else
			state <= work_mode;
		end
	default: state <= start;
	endcase
end

endmodule