c4u.bde

FIFo参考设计16x32 FIFO with simultaneous read/write operations.

SCHM0102

HEADER
{
 FREEID 1500
 VARIABLES
 {
  #BLOCKTABLE_FILE="#table.bde"
  #BLOCKTABLE_INCLUDED="1"
  #CELL="C4U"
  #LANGUAGE="EDIF"
  AUTHOR="ALDEC"
  COMPANY="ALDEC"
  CREATIONDATE="14/12/99"
  TITLE="C4U"
 }
 SYMBOL "spartan2" "AND2" "AND2"
 {
  HEADER
  {
   VARIABLES
   {
    #BLACK_BOX="1"
    #DESCRIPTION="2-Input AND Gate with Non-Inverted Inputs"
    #GENERIC0="TimingChecksOn:BOOLEAN:=False"
    #GENERIC1="InstancePath:STRING:=\"*\""
    #GENERIC2="Xon:BOOLEAN:=True"
    #GENERIC3="MsgOn:BOOLEAN:=False"
    #GENERIC4="tpd_I1_O:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC5="tpd_I0_O:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC6="tipd_I1:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC7="tipd_I0:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #LANGUAGE="VHDL"
    #MODIFIED="1048697964"
    #NO_SYMBOL_NAME="1"
    #NO_SYMBOL_REFERENCE="1"
    DEVICE="AND"
    LEVEL="XILINX"
    LIBVER="2.0.0"
   }
  }
  PAGE "" 
  {
   PAGEHEADER
   {
    RECT (0,0,160,100)
    FREEID 12
   }
   
   BODY
   {
    TEXT  2, 0, 1
    {
     TEXT "$#NAME"
     RECT (0,38,17,60)
     ALIGN 8
     COLOR (0,0,255)
     PARENT 1
     FONT (8,0,0,400,0,0,0,"Arial")
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    TEXT  4, 0, 1
    {
     TEXT "$#NAME"
     RECT (0,-2,17,20)
     ALIGN 8
     COLOR (0,0,255)
     PARENT 3
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    TEXT  6, 0, 1
    {
     TEXT "$#NAME"
     RECT (145,18,160,40)
     ALIGN 10
     COLOR (0,0,255)
     PARENT 5
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    LINE  7, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     POINTS ( (40,10), (40,70) )
     FILL (1,(0,255,255),0)
    }
    LINE  8, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     POINTS ( (90,10), (40,10) )
     FILL (1,(0,255,255),0)
    }
    LINE  9, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     POINTS ( (40,70), (90,70) )
     FILL (1,(0,255,255),0)
    }
    ARC  10, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     FILL (1,(80,41,204),0)
     START (90,70)
     MIDDLE (120,40)
     END (90,10)
    }
    TEXT  11, 0, 0
    {
     TEXT "AND2"
     RECT (20,80,71,102)
     COLOR (191,0,191)
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    PIN  1, 0, 0
    {
     COORD (0,60)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I0"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="19"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  3, 0, 0
    {
     COORD (0,20)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I1"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="18"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  5, 0, 0
    {
     COORD (160,40)
     VARIABLES
     {
      #DIRECTION="OUT"
      #NAME="O"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="OUT"
      port_id="20"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (-40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
   }
  }
 }
 SYMBOL "spartan2" "AND3" "AND3"
 {
  HEADER
  {
   VARIABLES
   {
    #BLACK_BOX="1"
    #DESCRIPTION="3-Input AND Gate with Non-Inverted Inputs"
    #GENERIC0="TimingChecksOn:BOOLEAN:=False"
    #GENERIC1="InstancePath:STRING:=\"*\""
    #GENERIC2="Xon:BOOLEAN:=True"
    #GENERIC3="MsgOn:BOOLEAN:=False"
    #GENERIC4="tpd_I2_O:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC5="tpd_I1_O:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC6="tpd_I0_O:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC7="tipd_I2:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC8="tipd_I1:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC9="tipd_I0:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #LANGUAGE="VHDL"
    #MODIFIED="1048697919"
    #NO_SYMBOL_NAME="1"
    #NO_SYMBOL_REFERENCE="1"
    DEVICE="AND"
    LEVEL="XILINX"
    LIBVER="2.0.0"
   }
  }
  PAGE "" 
  {
   PAGEHEADER
   {
    RECT (0,0,160,140)
    FREEID 14
   }
   
   BODY
   {
    TEXT  2, 0, 1
    {
     TEXT "$#NAME"
     RECT (0,78,17,100)
     ALIGN 8
     COLOR (0,0,255)
     PARENT 1
     FONT (8,0,0,400,0,0,0,"Arial")
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    TEXT  4, 0, 1
    {
     TEXT "$#NAME"
     RECT (0,38,17,60)
     ALIGN 8
     COLOR (0,0,255)
     PARENT 3
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    TEXT  6, 0, 1
    {
     TEXT "$#NAME"
     RECT (0,-2,17,20)
     ALIGN 8
     COLOR (0,0,255)
     PARENT 5
     FONT (8,0,0,400,0,0,0,"Arial")
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    TEXT  8, 0, 1
    {
     TEXT "$#NAME"
     RECT (145,38,160,60)
     ALIGN 10
     COLOR (0,0,255)
     PARENT 7
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    LINE  9, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     POINTS ( (40,20), (40,100) )
     FILL (1,(0,255,255),0)
    }
    ARC  10, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     FILL (1,(176,40,204),0)
     START (90,90)
     MIDDLE (120,60)
     END (90,30)
    }
    LINE  11, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     POINTS ( (40,90), (90,90) )
     FILL (1,(0,255,255),0)
    }
    LINE  12, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     POINTS ( (90,30), (40,30) )
     FILL (1,(0,255,255),0)
    }
    TEXT  13, 0, 0
    {
     TEXT "AND3"
     RECT (20,120,71,142)
     COLOR (191,0,191)
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    PIN  1, 0, 0
    {
     COORD (0,100)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I0"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="3"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  3, 0, 0
    {
     COORD (0,60)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I1"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="2"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  5, 0, 0
    {
     COORD (0,20)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I2"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="1"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  7, 0, 0
    {
     COORD (160,60)
     VARIABLES
     {
      #DIRECTION="OUT"
      #NAME="O"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="OUT"
      port_id="7"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (-40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
   }
  }
 }
 SYMBOL "spartan2" "FDCE" "FDCE"
 {
  HEADER
  {
   VARIABLES
   {
    #BLACK_BOX="1"
    #DESCRIPTION="D Flip-Flop with Clock Enable and Asynchronous Clear"
    #GENERIC0="TimingChecksOn:BOOLEAN:=False"
    #GENERIC1="InstancePath:STRING:=\"*\""
    #GENERIC10="thold_D_C_negedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC11="tsetup_CE_C_posedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC12="tsetup_CE_C_negedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC13="thold_CE_C_posedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC14="thold_CE_C_negedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC15="trecovery_CLR_C_negedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC16="thold_CLR_C_negedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC17="tpw_C_posedge:VitalDelayType:=0.0 ns"
    #GENERIC18="tpw_CLR_posedge:VitalDelayType:=0.0 ns"
    #GENERIC19="tpw_C_negedge:VitalDelayType:=0.0 ns"
    #GENERIC2="Xon:BOOLEAN:=True"
    #GENERIC20="tipd_D:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC21="tipd_C:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC22="tipd_CE:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC23="tipd_CLR:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC3="MsgOn:BOOLEAN:=False"
    #GENERIC4="INIT:STRING:=\"R\""
    #GENERIC5="tpd_CLR_Q:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC6="tpd_C_Q:VitalDelayType01:=(0.0 ns,0.0 ns)"
    #GENERIC7="tsetup_D_C_posedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC8="tsetup_D_C_negedge_posedge:VitalDelayType:=0.0 ns"
    #GENERIC9="thold_D_C_posedge_posedge:VitalDelayType:=0.0 ns"
    #LANGUAGE="VHDL"
    #MODIFIED="1016718410"
    #NO_SYMBOL_NAME="1"
    #NO_SYMBOL_REFERENCE="1"
    DEVICE="DFF"
    INIT="R"
    LEVEL="XILINX"
    LIBVER="2.0.0"
   }
  }
  PAGE "" 
  {
   PAGEHEADER
   {
    RECT (0,0,240,240)
    FREEID 15
   }
   
   BODY
   {
    TEXT  2, 0, 0
    {
     TEXT "$#NAME"
     RECT (53,149,67,171)
     ALIGN 5
     COLOR (0,0,255)
     PARENT 1
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    TEXT  4, 0, 0
    {
     TEXT "$#NAME"
     RECT (50,109,77,131)
     ALIGN 4
     COLOR (0,0,255)
     PARENT 3
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    TEXT  6, 0, 0
    {
     TEXT "$#NAME"
     RECT (101,168,140,190)
     ALIGN 9
     COLOR (0,0,255)
     PARENT 5
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    TEXT  8, 0, 0
    {
     TEXT "$#NAME"
     RECT (50,69,64,91)
     ALIGN 4
     COLOR (0,0,255)
     PARENT 7
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    TEXT  10, 0, 0
    {
     TEXT "$#NAME"
     RECT (175,69,190,91)
     ALIGN 6
     COLOR (0,0,255)
     PARENT 9
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    RECT  11, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     AREA (40,40,200,200)
     FILL (1,(0,255,255),0)
    }
    LINE  12, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     POINTS ( (40,220), (120,220), (120,200) )
     FILL (1,(0,255,255),0)
    }
    LINE  13, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     POINTS ( (40,150), (50,160), (40,170) )
     FILL (1,(0,255,255),0)
    }
    TEXT  14, 0, 0
    {
     TEXT "FDCE"
     RECT (94,18,147,40)
     ALIGN 9
     COLOR (191,0,191)
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    PIN  1, 0, 0
    {
     COORD (0,160)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="C"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="3"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  3, 0, 0
    {
     COORD (0,120)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="CE"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="2"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  5, 0, 0
    {
     COORD (0,220)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="CLR"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="6"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  7, 0, 0
    {
     COORD (0,80)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="D"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="1"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  9, 0, 0
    {
     COORD (240,80)
     VARIABLES
     {
      #DIRECTION="OUT"
      #NAME="Q"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="OUT"
      port_id="4"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (-40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
   }
  }
 }
 SYMBOL "spartan2" "FMAP" "FMAP"
 {
  HEADER
  {
   VARIABLES
   {
    #BLACK_BOX="1"
    #DESCRIPTION="F Function Generator Partitioning Control Symbol"
    #GENERIC0="TimingChecksOn:BOOLEAN:=False"
    #GENERIC1="InstancePath:STRING:=\"*\""
    #GENERIC2="Xon:BOOLEAN:=True"
    #GENERIC3="MsgOn:BOOLEAN:=False"
    #LANGUAGE="VHDL"
    #MODIFIED="1016718753"
    #NO_SYMBOL_NAME="1"
    #NO_SYMBOL_REFERENCE="1"
    DEVICE="FMAP"
    LEVEL="XILINX"
    LIBVER="2.0.0"
   }
  }
  PAGE "" 
  {
   PAGEHEADER
   {
    RECT (0,0,240,280)
    FREEID 13
   }
   
   BODY
   {
    TEXT  2, 0, 0
    {
     TEXT "$#NAME"
     RECT (50,189,67,211)
     ALIGN 4
     COLOR (0,0,255)
     PARENT 1
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    TEXT  4, 0, 0
    {
     TEXT "$#NAME"
     RECT (50,149,67,171)
     ALIGN 4
     COLOR (0,0,255)
     PARENT 3
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    TEXT  6, 0, 0
    {
     TEXT "$#NAME"
     RECT (50,109,67,131)
     ALIGN 4
     COLOR (0,0,255)
     PARENT 5
     FONT (8,0,0,400,0,0,0,"Arial")
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    TEXT  8, 0, 0
    {
     TEXT "$#NAME"
     RECT (50,69,67,91)
     ALIGN 4
     COLOR (0,0,255)
     PARENT 7
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    TEXT  10, 0, 0
    {
     TEXT "$#NAME"
     RECT (175,129,190,151)
     ALIGN 6
     COLOR (0,0,255)
     PARENT 9
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    RECT  11, 0, 0
    {
     OUTLINE 0,1, (0,0,191)
     AREA (40,40,200,240)
     FILL (1,(0,255,255),0)
    }
    TEXT  12, 0, 0
    {
     TEXT "FMAP"
     RECT (94,18,147,40)
     ALIGN 9
     COLOR (191,0,191)
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    PIN  1, 0, 0
    {
     COORD (0,200)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I1"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="1"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  3, 0, 0
    {
     COORD (0,160)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I2"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="3"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  5, 0, 0
    {
     COORD (0,120)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I3"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="4"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  7, 0, 0
    {
     COORD (0,80)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="I4"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="5"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
    PIN  9, 0, 0
    {
     COORD (240,140)
     VARIABLES
     {
      #DIRECTION="IN"
      #NAME="O"
      #NUMBER="0"
      #VHDL_TYPE="std_ulogic"
      PINTYPE="IN"
      port_id="2"
     }
     LINE  1, 0, 0
     {
      OUTLINE 0,1, (0,0,191)
      POINTS ( (-40,0), (0,0) )
      FILL (1,(0,0,0),0)
     }
    }
   }
  }
 }
 SYMBOL "spartan2" "GND" "GND"
 {
  HEADER
  {
   VARIABLES
   {
    #BLACK_BOX="1"
    #DESCRIPTION="Ground-Connection Signal Tag"
    #GENERIC0="TimingChecksOn:BOOLEAN:=False"
    #GENERIC1="InstancePath:STRING:=\"*\""
    #GENERIC2="Xon:BOOLEAN:=True"
    #GENERIC3="MsgOn:BOOLEAN:=False"
    #LANGUAGE="VHDL"
    #MODIFIED="1048697954"
    #NO_SYMBOL_NAME="1"
    #NO_SYMBOL_REFERENCE="1"
    LEVEL="XILINX"
    LIBVER="2.0.0"
   }
  }
  PAGE "" 
  {
   PAGEHEADER
   {
    RECT (0,0,80,80)
    FREEID 9
   }
   
   BODY
   {
    TEXT  2, 0, 1
    {
     TEXT "$#NAME"
     RECT (40,-2,55,20)
     ALIGN 8
     COLOR (0,0,255)
     PARENT 1
     FONT (8,0,0,400,0,0,0,"Arial")
    }
    LINE  3, 0, 0
    {