_primary.vhd

来自「Pure hardware JPEG Encoder design. Packa」· VHDL 代码 · 共 9 行

library verilog;
use verilog.vl_types.all;
entity jpeg_tb is
    generic(
        CAPTURE_ORAM    : string  := "OUT_RAM.txt";
        CAPTURE_BIN     : string  := "test_out.jpg"
    );
end jpeg_tb;