ledshow.vhd

来自「本程序完整的实现了数字频率计的常用功能。并对通常数字频率计的常见问题进行了改进。」· VHDL 代码 · 共 23 行

VHD
23
字号
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity ledshow is
  port(data:in std_logic_vector(3 downto 0);
       dout:out std_logic_vector(6 downto 0));
end entity;
architecture art of ledshow is
begin
  with data select
  dout<="0111111" when "0000",
        "0000110" when "0001",
        "1011011" when "0010",
        "1001111" when "0011",
        "1100110" when "0100",
        "1101101" when "0101",
        "1111101" when "0110",
        "0000111" when "0111",
        "1111111" when "1000",
        "1101111" when "1001",
        "0000000" when others;
end architecture art;

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