📄 total.rpt
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- 4 - A 18 OR2 ! 0 3 0 4 |SCAN:8|:872
- 5 - A 18 OR2 ! 0 3 0 5 |SCAN:8|:882
- 7 - A 18 OR2 ! 0 2 0 1 |SCAN:8|:886
- 8 - A 18 OR2 ! 0 4 0 1 |SCAN:8|:887
- 3 - A 18 OR2 ! 0 3 0 4 |SCAN:8|:892
- 2 - A 18 OR2 ! 0 4 0 14 |SCAN:8|:895
- 5 - B 20 OR2 0 3 0 1 |SCAN:8|:901
- 6 - B 20 OR2 0 3 0 1 |SCAN:8|:904
- 2 - B 20 OR2 0 3 0 1 |SCAN:8|:907
- 3 - A 24 OR2 0 3 0 1 |SCAN:8|:910
- 5 - A 24 OR2 0 3 0 1 |SCAN:8|:913
- 7 - A 24 OR2 0 3 0 1 |SCAN:8|:916
- 1 - A 24 OR2 0 3 0 14 |SCAN:8|:919
- 4 - B 21 OR2 ! 0 3 0 1 |SCAN:8|:925
- 5 - B 21 OR2 ! 0 3 0 1 |SCAN:8|:928
- 8 - B 21 OR2 ! 0 3 0 1 |SCAN:8|:931
- 3 - A 21 OR2 ! 0 3 0 1 |SCAN:8|:934
- 5 - A 21 OR2 ! 0 3 0 1 |SCAN:8|:937
- 7 - A 21 OR2 ! 0 3 0 1 |SCAN:8|:940
- 1 - A 21 OR2 ! 0 3 0 14 |SCAN:8|:943
- 5 - B 24 OR2 0 3 0 1 |SCAN:8|:949
- 6 - B 24 OR2 0 3 0 1 |SCAN:8|:952
- 2 - B 24 OR2 0 3 0 1 |SCAN:8|:955
- 3 - A 14 OR2 0 3 0 1 |SCAN:8|:958
- 5 - A 14 OR2 0 3 0 1 |SCAN:8|:961
- 7 - A 14 OR2 0 3 0 1 |SCAN:8|:964
- 1 - A 14 OR2 0 3 0 14 |SCAN:8|:967
- 2 - C 21 OR2 ! 0 2 0 3 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:139
- 3 - C 21 OR2 ! 0 3 0 2 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:147
- 1 - C 21 OR2 ! 0 2 0 4 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:151
- 8 - C 24 AND2 0 4 0 4 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:163
- 6 - C 15 AND2 0 2 0 1 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:167
- 5 - C 15 AND2 0 4 0 4 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:175
- 4 - C 17 AND2 0 3 0 1 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:183
- 8 - C 17 AND2 0 4 0 4 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:187
- 5 - C 22 AND2 0 3 0 1 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:195
- 2 - C 22 AND2 0 4 0 3 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:199
- 4 - C 15 AND2 0 3 0 4 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:207
- 8 - C 19 AND2 0 3 0 1 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:215
- 4 - C 19 AND2 0 4 0 2 |SECOND1:6|LPM_ADD_SUB:341|addcore:adder|:219
- 3 - C 19 DFFE + 0 4 0 2 |SECOND1:6|:2
- 7 - C 19 DFFE + 0 3 0 2 |SECOND1:6|tem23 (|SECOND1:6|:4)
- 5 - C 19 DFFE + 0 2 0 3 |SECOND1:6|tem22 (|SECOND1:6|:5)
- 1 - C 14 DFFE + 0 2 0 3 |SECOND1:6|tem21 (|SECOND1:6|:6)
- 2 - C 19 DFFE + 0 3 0 3 |SECOND1:6|tem20 (|SECOND1:6|:7)
- 1 - C 13 DFFE + 0 2 0 4 |SECOND1:6|tem19 (|SECOND1:6|:8)
- 8 - C 15 DFFE + 0 3 0 2 |SECOND1:6|tem18 (|SECOND1:6|:9)
- 3 - C 15 DFFE + 0 2 0 3 |SECOND1:6|tem17 (|SECOND1:6|:10)
- 6 - C 22 DFFE + 0 2 0 2 |SECOND1:6|tem16 (|SECOND1:6|:11)
- 3 - C 22 DFFE + 0 3 0 3 |SECOND1:6|tem15 (|SECOND1:6|:12)
- 1 - C 22 DFFE + 0 2 0 4 |SECOND1:6|tem14 (|SECOND1:6|:13)
- 5 - C 17 DFFE + 0 2 0 2 |SECOND1:6|tem13 (|SECOND1:6|:14)
- 3 - C 17 DFFE + 0 3 0 3 |SECOND1:6|tem12 (|SECOND1:6|:15)
- 1 - C 17 DFFE + 0 2 0 4 |SECOND1:6|tem11 (|SECOND1:6|:16)
- 7 - C 15 DFFE + 0 3 0 2 |SECOND1:6|tem10 (|SECOND1:6|:17)
- 1 - C 15 DFFE + 0 3 0 3 |SECOND1:6|tem9 (|SECOND1:6|:18)
- 3 - C 24 DFFE + 0 2 0 4 |SECOND1:6|tem8 (|SECOND1:6|:19)
- 6 - C 24 DFFE + 0 2 0 2 |SECOND1:6|tem7 (|SECOND1:6|:20)
- 5 - C 24 DFFE + 0 3 0 2 |SECOND1:6|tem6 (|SECOND1:6|:21)
- 4 - C 24 DFFE + 0 2 0 3 |SECOND1:6|tem5 (|SECOND1:6|:22)
- 8 - C 21 DFFE + 0 2 0 1 |SECOND1:6|tem4 (|SECOND1:6|:23)
- 6 - C 21 DFFE + 0 3 0 1 |SECOND1:6|tem3 (|SECOND1:6|:24)
- 7 - C 21 DFFE + 0 2 0 2 |SECOND1:6|tem2 (|SECOND1:6|:25)
- 5 - C 21 DFFE + 0 2 0 1 |SECOND1:6|tem1 (|SECOND1:6|:26)
- 4 - C 21 DFFE + 0 1 0 2 |SECOND1:6|tem0 (|SECOND1:6|:27)
- 6 - C 19 OR2 0 4 0 24 |SECOND1:6|:127
- 1 - C 19 OR2 0 4 0 2 |SECOND1:6|:142
- 4 - C 22 OR2 s 0 4 0 1 |SECOND1:6|~149~1
- 2 - C 17 OR2 0 4 0 1 |SECOND1:6|:169
- 2 - C 15 OR2 0 4 0 1 |SECOND1:6|:184
- 1 - C 24 AND2 0 3 0 1 |SECOND1:6|:199
- 2 - C 24 OR2 0 3 0 2 |SECOND1:6|:212
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: e:\eda\last\total.rpt
total
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 15/ 96( 15%) 0/ 48( 0%) 28/ 48( 58%) 0/16( 0%) 5/16( 31%) 0/16( 0%)
B: 7/ 96( 7%) 0/ 48( 0%) 24/ 48( 50%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
C: 2/ 96( 2%) 0/ 48( 0%) 19/ 48( 39%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
19: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
20: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
21: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: e:\eda\last\total.rpt
total
** CLOCK SIGNALS **
Type Fan-out Name
DFF 74 |PROCONTROL:1|tem
INPUT 28 clk10M
DFF 6 |cnt10_8:2|CNT10:7|:8
DFF 6 |cnt10_8:2|CNT10:6|:8
DFF 6 |cnt10_8:2|CNT10:5|:8
DFF 6 |cnt10_8:2|CNT10:4|:8
DFF 6 |cnt10_8:2|CNT10:3|:8
DFF 6 |cnt10_8:2|CNT10:2|:8
DFF 6 |cnt10_8:2|CNT10:1|:8
INPUT 5 fsin
DFF 2 |SECOND1:6|:2
Device-Specific Information: e:\eda\last\total.rpt
total
** CLEAR SIGNALS **
Type Fan-out Name
LCELL 40 |PROCONTROL:1|:36
Device-Specific Information: e:\eda\last\total.rpt
total
** EQUATIONS **
clk10M : INPUT;
fsin : INPUT;
-- Node name is 'cin'
-- Equation name is 'cin', type is output
cin = _LC8_B23;
-- Node name is 'control0'
-- Equation name is 'control0', type is output
control0 = _LC1_B19;
-- Node name is 'control1'
-- Equation name is 'control1', type is output
control1 = _LC2_B19;
-- Node name is 'control2'
-- Equation name is 'control2', type is output
control2 = _LC1_A18;
-- Node name is 'show0'
-- Equation name is 'show0', type is output
show0 = _LC1_A20;
-- Node name is 'show1'
-- Equation name is 'show1', type is output
show1 = _LC2_A22;
-- Node name is 'show2'
-- Equation name is 'show2', type is output
show2 = _LC3_A20;
-- Node name is 'show3'
-- Equation name is 'show3', type is output
show3 = _LC5_A23;
-- Node name is 'show4'
-- Equation name is 'show4', type is output
show4 = _LC8_A22;
-- Node name is 'show5'
-- Equation name is 'show5', type is output
show5 = _LC1_A22;
-- Node name is 'show6'
-- Equation name is 'show6', type is output
show6 = _LC3_A23;
-- Node name is '|cnt10_8:2|CNT10:1|LPM_ADD_SUB:83|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_A19', type is buried
_LC6_A19 = LCELL( _EQ001);
_EQ001 = _LC2_A19 & _LC3_A19;
-- Node name is '|cnt10_8:2|CNT10:1|LPM_ADD_SUB:83|addcore:adder|:63' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_A19', type is buried
_LC7_A19 = LCELL( _EQ002);
_EQ002 = _LC2_A19 & _LC3_A19 & _LC8_A19;
-- Node name is '|cnt10_8:2|CNT10:1|:13' = '|cnt10_8:2|CNT10:1|tem0'
-- Equation name is '_LC2_A19', type is buried
_LC2_A19 = DFFE( _EQ003, GLOBAL( fsin), !_LC2_C18, VCC, VCC);
_EQ003 = _LC2_A19 & !_LC5_C18
# !_LC2_A19 & _LC5_C18;
-- Node name is '|cnt10_8:2|CNT10:1|:12' = '|cnt10_8:2|CNT10:1|tem1'
-- Equation name is '_LC3_A19', type is buried
_LC3_A19 = DFFE( _EQ004, GLOBAL( fsin), !_LC2_C18, VCC, VCC);
_EQ004 = _LC2_A19 & !_LC3_A19 & !_LC4_A19 & _LC5_C18
# !_LC2_A19 & _LC3_A19 & !_LC4_A19
# _LC3_A19 & !_LC5_C18;
-- Node name is '|cnt10_8:2|CNT10:1|:11' = '|cnt10_8:2|CNT10:1|tem2'
-- Equation name is '_LC8_A19', type is buried
_LC8_A19 = DFFE( _EQ005, GLOBAL( fsin), !_LC2_C18, VCC, VCC);
_EQ005 = !_LC4_A19 & !_LC6_A19 & _LC8_A19
# !_LC4_A19 & _LC5_C18 & _LC6_A19 & !_LC8_A19
# !_LC5_C18 & _LC8_A19;
-- Node name is '|cnt10_8:2|CNT10:1|:10' = '|cnt10_8:2|CNT10:1|tem3'
-- Equation name is '_LC1_A19', type is buried
_LC1_A19 = DFFE( _EQ006, GLOBAL( fsin), !_LC2_C18, VCC, VCC);
_EQ006 = _LC1_A19 & !_LC5_C18
# _LC1_A19 & !_LC4_A19 & !_LC7_A19
# !_LC1_A19 & !_LC4_A19 & _LC5_C18 & _LC7_A19;
-- Node name is '|cnt10_8:2|CNT10:1|:8'
-- Equation name is '_LC5_A19', type is buried
_LC5_A19 = DFFE( _EQ007, GLOBAL( fsin), VCC, VCC, !_LC2_C18);
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