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📄 prev_cmp_databuffer.qmsg

📁 buffer for in/out data.
💻 QMSG
字号:
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Oct 27 20:59:40 2008 " "Info: Processing started: Mon Oct 27 20:59:40 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off DATABUFFER -c DATABUFFER " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off DATABUFFER -c DATABUFFER" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../ClockGen.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ../ClockGen.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ClockGen-behav " "Info: Found design unit 1: ClockGen-behav" {  } { { "../ClockGen.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/ClockGen.vhd" 16 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 ClockGen " "Info: Found entity 1: ClockGen" {  } { { "../ClockGen.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/ClockGen.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "BUFFER.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file BUFFER.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 data_buffer-RTL " "Info: Found design unit 1: data_buffer-RTL" {  } { { "BUFFER.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/BUFFER/BUFFER.vhd" 16 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 data_buffer " "Info: Found entity 1: data_buffer" {  } { { "BUFFER.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/BUFFER/BUFFER.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\")\";  expecting \"(\", or an identifier, or  unary operator DATABUFFER.vhd(69) " "Error (10500): VHDL syntax error at DATABUFFER.vhd(69) near text \")\";  expecting \"(\", or an identifier, or  unary operator" {  } { { "DATABUFFER.vhd" "" { Text "D:/Term 9/VHDL/BIG EXAM VHDL/BUFFER/DATABUFFER.vhd" 69 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DATABUFFER.vhd 0 0 " "Info: Found 0 design units, including 0 entities, in source file DATABUFFER.vhd" {  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 1  0 s Quartus II " "Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warnings" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "191 " "Error: Peak virtual memory: 191 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Error" "EQEXE_END_BANNER_TIME" "Mon Oct 27 20:59:41 2008 " "Error: Processing ended: Mon Oct 27 20:59:41 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Error" "EQEXE_ELAPSED_TIME" "00:00:01 " "Error: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Error: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
{ "Error" "EFLOW_ERROR_COUNT" "Full Compilation 3 s 0 s " "Error: Quartus II Full Compilation was unsuccessful. 3 errors, 0 warnings" {  } {  } 0 0 "Quartus II %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}

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