de2_top.tan.rpt

DE2 S O P C 用硬件语言 描述地 开发板上测试 CLM模块 实现视频传输

Timing Analyzer report for DE2_TOP
Fri May 12 10:39:52 2006
Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'CLOCK_27'
  6. Clock Setup: 'TD_VS'
  7. Clock Setup: 'TD_HS'
  8. Clock Setup: 'CLOCK_50'
  9. Clock Setup: 'altera_internal_jtag~TCKUTAP'
 10. tsu
 11. tco
 12. tpd
 13. th
 14. Timing Analyzer Messages



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; Legal Notice ;
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Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of