4bit_alu.npl

this program performs the functonality of 4 bit alu

JDF G
// Created by Project Navigator ver 1.0
PROJECT 4bit_alu
DESIGN 4bit_alu
DEVFAM spartan3
DEVFAMTIME 0
DEVICE xc3s50
DEVICETIME 1137991976
DEVPKG pq208
DEVPKGTIME 1137991976
DEVSPEED -5
DEVSPEEDTIME 1139901189
DEVTOPLEVELMODULETYPE HDL
TOPLEVELMODULETYPETIME 0
DEVSYNTHESISTOOL XST (VHDL/Verilog)
SYNTHESISTOOLTIME 0
DEVSIMULATOR Other
SIMULATORTIME 0
DEVGENERATEDSIMULATIONMODEL VHDL
GENERATEDSIMULATIONMODELTIME 0
SOURCE 4bit_alu.vhd
SOURCE dflip.vhd
SOURCE dflipflop.vhd
SOURCE invtr.vhd
SOURCE fbitaddr.vhd
SOURCE fulladder.vhd
SOURCE testcnt.vhd
SOURCE buff.vhd
DEPASSOC alu_4bit alu_4bit.ucf
[Normal]
xilxBitgCfg_GenOpt_MaskFile=xstvhd, spartan3, Implementation.t_bitFile, 1139900370, True
xilxBitgCfg_GenOpt_ReadBack_Spartan3=xstvhd, spartan3, Implementation.t_bitFile, 1139900417, False
xilxBitgReadBk_Sec=xstvhd, spartan3, Implementation.t_bitFile, 1139900503, Enable Readback and Reconfiguration
[STRATEGY-LIST]
Normal=True