📄 hangtb.vhd
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library ieee;
use ieee.std_logic_1164.all;
entity hangtb is
port(
ck: in std_logic;
htb: out std_logic
);
end hangtb;
architecture a of hangtb is
signal count: integer range 0 to 79;
begin
process
begin
wait until ck= '1';
if count < 79 then
count <= count + 1;
else
count <= 0;
end if;
end process;
process(count)
begin
if count <=5 then
htb <= '0';
else
htb<='1';
end if;
end process;
end a;
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