mb8953x.h

sircs decoder, for amplifier.. this is to decode

	} BIT;
};

union addl_ {						/********** ((( ADDL ))) ************/
	unsigned char BYTE;
	struct {
		unsigned char DMMY:8;		/* 						 			*/
	} BIT;
};

/****************************************************************************************************/
/*			External Interrupt																		*/
/****************************************************************************************************/

union eic1_ {
	unsigned char BYTE;
	struct {
		unsigned char EIE0	:1;		/* INT10 Interrupt Enable/Disable	*/
		unsigned char SEL0	:1;		/* INT10 Edge Select				*/
		unsigned char SEL1	:1;		/* INT10 Edge Select				*/
		unsigned char EIR0	:1;		/* INT10 Interrupt Request			*/
		unsigned char EIE1	:1;		/* INT11 Interrupt Enable/Disable 	*/
		unsigned char SEL2	:1;		/* 									*/
		unsigned char SEL3	:1;		/* INT11 Edge Select	 			*/
		unsigned char EIR1	:1;		/* INT11 Interrupt Request			*/
	} BIT;
};

union eic2_ {
	unsigned char BYTE;
	struct {
		unsigned char EIE2	:1;		/* INT12 Interrupt Enable/Disable	*/
		unsigned char SEL4	:1;		/* INT12 Edge Select				*/
		unsigned char SEL5	:1;		/* INT12 Edge Select				*/
		unsigned char EIR2	:1;		/* INT12 Interrupt Request			*/
		unsigned char EIE3	:1;		/* INT13 Interrupt Enable/Disable 	*/
		unsigned char SEL6	:1;		/* INT13 Edge Selec					*/
		unsigned char SEL7	:1;		/* INT13 Edge Select	 			*/
		unsigned char EIR3	:1;		/* INT13 Interrupt Request			*/
	} BIT;
};

union iccr_ {
	unsigned char BYTE;
	struct {
		unsigned char CS0	:1;		/* Clock2 Select Bit				*/
		unsigned char CS1	:1;		/* Clock2 Select Bit				*/
		unsigned char CS2	:1;		/* Clock1 Select Bit				*/
		unsigned char CS3	:1;		/* Clock1 Select Bit				*/
		unsigned char CS4	:1;		/* Clock1 Select Bit			 	*/
		unsigned char EN	:1;		/* IIC BUS Interface Enable			*/
		unsigned char IBS	:1;		/* Input Buffer Select Bit	 		*/
		unsigned char DMBP	:1;		/* Devider m Bypass Bit				*/
	} BIT;
};

/*union eie2_ {
	unsigned char BYTE;
	struct {
		unsigned char IE20	:1;		/* INT20 External Interrupt Enable	*/
/*		unsigned char IE21	:1;		/* INT21 External Interrupt Enable	*/
/*		unsigned char IE22	:1;		/* INT22 External Interrupt Enable	*/
/*		unsigned char IE23	:1;		/* INT23 External Interrupt Enable	*/
/*		unsigned char IE24	:1;		/* INT24 External Interrupt Enable	*/
/*		unsigned char IE25	:1;		/* INT25 External Interrupt Enable	*/
/*		unsigned char IE26	:1;		/* INT26 External Interrupt Enable	*/
/*		unsigned char IE27	:1;		/* INT27 External Interrupt Enable	*/
/*	} BIT;
};*/

union eif2_ {
	unsigned char BYTE;
	struct {
		unsigned char IF20	:1;		/* External Interrupt 2 Request 	*/
		unsigned char ____	:7;		/* Reseved							*/
	} BIT;
};

/****************************************************************************************************/
/*			UART/SIO 																				*/
/****************************************************************************************************/

union smc21_ {						/******* ((( SMC21 ))) **************/
	unsigned char BYTE;
	struct {
		unsigned char CLK0	:1;		/* Select Clock						*/
		unsigned char CLK1	:1;		/* 									*/
		unsigned char CLK2	:1;		/* 									*/
		unsigned char CL	:1;		/* Charactor Bit(7bit or 8bit)		*/
		unsigned char SBL	:1;		/* Stop Bit							*/
		unsigned char TDP	:1;		/* Select Parity(Even or Odd)		*/
		unsigned char PEN	:1;		/* Control Parity		 			*/
		unsigned char MD	:1;		/* Select Mode						*/
	} BIT;
};

union smc22_ {						/******* ((( SMC22 ))) **************/
	unsigned char BYTE;
	struct {
		unsigned char TIE	:1;		/* Send Interrupt(Enable/Disable)	*/
		unsigned char RIE	:1;		/* Receive Interrupt(Enable/Disable)*/
		unsigned char SCKE	:1;		/* Select Clock						*/
		unsigned char TXOE	:1;		/* Out Serial Data(Enable/Disable)	*/
		unsigned char BRGE	:1;		/* BoadRate Generator				*/
		unsigned char TXE	:1;		/* TX Enable Bit					*/
		unsigned char RXE	:1;		/* RX Enable Bit		 			*/
		unsigned char RERC	:1;		/* Clear RX Error Flag				*/
	} BIT;
};

union ssd2_ {						/******* ((( SSD2 ))) **************/
	unsigned char BYTE;
	struct {
		unsigned char DMY	:3;		/* 									*/
		unsigned char TDRE	:1;		/* Send Data Empty Flag				*/
		unsigned char RDRF	:1;		/* Receive Data Empty Flag			*/
		unsigned char FER	:1;		/* Flaming Error Flag				*/
		unsigned char OVE	:1;		/* Over Run Error Flag				*/
		unsigned char PER	:1;		/* Parity Error Flag				*/
	} BIT;
};

union sodr2_ {						/****** ((( SDOR2 ))) ***************/
	unsigned char BYTE;
	struct {
		unsigned char DMMY:8;		/* 						 			*/
	} BIT;
};

/****************************************************************************************************/
/*			8BIT SIO 																				*/
/****************************************************************************************************/

union smr_ {						/****** ((( SMR ))) ******************/
	unsigned char BYTE;
	struct {
		unsigned char SST	:1;		/* Serial I/O Transmition Start Bit	*/
		unsigned char BDS	:1;		/* Receive Interrupt(Enable/Disable)*/
		unsigned char CKS0	:1;		/* Select Clock						*/
		unsigned char CKS1	:1;		/* 									*/
		unsigned char SOE	:1;		/* Serial Data TX Enable Bit		*/
		unsigned char SCKE	:1;		/* Shift Clock TX Enable Bit		*/
		unsigned char SIOE	:1;		/* Interrupt Enable Bit	 			*/
		unsigned char SIOF	:1;		/* Interrupt Request Flag			*/
	} BIT;
};

/****************************************************************************************************/
/*			Flash Control Register																	*/
/****************************************************************************************************/

#define PDR0	(*(union bits_		*)0x00)
#define DDR0	(*(union bits_		*)0x01)
#define PDR1	(*(union bits_		*)0x02)
#define DDR1	(*(union bits_		*)0x03)

#define SYCC	(*(union bits_		*)0x07)
#define STBC	(*(union stbc_		*)0x08)
#define TBTC	(*(union tbtc_		*)0x0A)

#define PDR2	(*(union bits_		*)0x0C)
#define DDR2	(*(union bits_		*)0x0D)
#define PDR3	(*(union bits_		*)0x0E)
#define DDR3	(*(union bits_		*)0x0F)
#define PDR4	(*(union bits_		*)0x10)
#define DDR4	(*(union bits_		*)0x11)
#define PDR5	(*(union bits_		*)0x12)
#define PDR6	(*(union bits_		*)0x13)

#define CNTR1	(*(union cntr1_		*)0x27)
#define CNTR2	(*(union cntr2_		*)0x28)
#define CNTR3	(*(union cntr3_		*)0x29)
#define COMR1	(*(union comr1_		*)0x2A)
#define COMR2	(*(union comr2_		*)0x2B)
#define PCR1	(*(union pcr1_		*)0x2C)
#define PCR2	(*(union pcr2_		*)0x2D)
#define RLBR	(*(union bits_		*)0x2E)

#define	SMC21	(*(union smc21_		*)0x2F)
#define	SMC22	(*(union smc22_		*)0x30)
#define	SSD2	(*(union ssd2_		*)0x31)
#define	SODR2	(*(union sodr2_		*)0x32)
#define	SRC2	(*(union bits_		*)0x33)

#define ADC1	(*(union adc1_		*)0x34)
#define ADC2	(*(union adc2_		*)0x35)
#define ADDL	(*(union addl_		*)0x36)
#define ADDH	(*(union addh_		*)0x37)

#define TMCR	(*(union tmcr_		*)0x3C)
#define TCR		(*(union word_		*)0x3D)

#define EIC1	(*(union eic1_		*)0x3F)
#define EIC2	(*(union eic2_		*)0x40)

#define ICCR	(*(union iccr_		*)0x53)

/*#define EIE2	(*(union eie2_		*)0x56)*/
#define EIF2	(*(union eif2_		*)0x57)

#define SMR		(*(union smr_		*)0x70)
#define SDR		(*(union bits_		*)0x71)
#define PURR0	(*(union bits_		*)0x72)

#define ILR1	(*(union bits_		*)0x7B)
#define ILR2	(*(union bits_		*)0x7C)
#define ILR3	(*(union bits_		*)0x7D)
#define ILR4	(*(union bits_		*)0x7E)

/****************************************************************************************************/