mux8.fit

8位全加器的VHDL语言描述

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 04/02/2009 20:29:46      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "mux8"
BEGIN

    DEVICE = "EP1K10TC100-1";

    "a"                            : INPUT_PIN  = 40     ;
    "b"                            : INPUT_PIN  = 89     ;
    "c"                            : INPUT_PIN  = 39     ;
    "i0"                           : INPUT_PIN  = 69     ;
    "i1"                           : INPUT_PIN  = 8      ;
    "i2"                           : INPUT_PIN  = 70     ;
    "i3"                           : INPUT_PIN  = 6      ;
    "i4"                           : INPUT_PIN  = 38     ;
    "i5"                           : INPUT_PIN  = 91     ;
    "i6"                           : INPUT_PIN  = 90     ;
    "i7"                           : INPUT_PIN  = 7      ;
    "q"                            : OUTPUT_PIN = 71     ;
    ":235"                         : LOCATION   = LC1_A10;
    "~235~1"                       : LOCATION   = LC2_A10;
    "~235~2"                       : LOCATION   = LC3_A10;
    "~235~3"                       : LOCATION   = LC4_A10;
    "~235~4"                       : LOCATION   = LC5_A10;
    "~235~5"                       : LOCATION   = LC6_A10;

END;

INTERNAL_INFO "mux8"
BEGIN
	DEVICE = EP1K10TC100-1;
    OD3P40  : LORAX = "1:FB3|2:FH3R0,PA5R0C9->LC2_A10,->LC3_A10,->LC4_A10,->LC5_A10||";
    OD1P89  : LORAX = "1:FB1|2:FH1R0,PA20R0C9->LC2_A10,->LC3_A10,->LC6_A10||";
    OD5P39  : LORAX = "1:FB5|2:CH1R0,PA7R0C9->LC1_A10||";
    OH12R0P69 : LORAX = "1:G40R0,PA12R0C9->LC4_A10|";
    OH4R0P8 : LORAX = "1:G47R0,PA3R0C9->LC4_A10|";
    OH10R0P70 : LORAX = "1:G41R0,PA18R0C9->LC5_A10|";
    OH1R0P6 : LORAX = "1:G36R0,PA2R0C9->LC5_A10|";
    OD2P38  : LORAX = "1:FB2|2:FH2R0,PA6R0C9->LC2_A10||";
    OD0P91  : LORAX = "1:FB0|2:FH0R0,PA0R0C9->LC2_A10||";
    OD4P90  : LORAX = "1:FB4|2:CH0R0,PA19R0C9->LC3_A10||";
    OH2R0P7 : LORAX = "1:G46R0,PA4R0C9->LC3_A10|";
    LC1_A10 : LORAX = "1:MSW0R0C9,HHL19R0->OH8R0P71|";
	LC2_A10 : LORAX2 = "OD2P38, OD0P91, OD1P89, OD3P40";
	LC3_A10 : LORAX2 = "OD4P90, OH2R0P7, OD1P89, OD3P40";
	LC4_A10 : LORAX2 = "X, OH4R0P8, OH12R0P69, OD3P40";
	LC5_A10 : LORAX2 = "X, OH1R0P6, OH10R0P70, OD3P40";
	LC6_A10 : LORAX2 = "X, OD1P89, LC5_A10, LC4_A10";
	LC1_A10 : LORAX2 = "OD5P39, LC2_A10, LC3_A10, LC6_A10";
END;