shzzh.tan.qmsg

利用数字电路知识

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "1khz " "Info: Assuming node \"1khz\" is an undefined clock" {  } { { "xianshi.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/xianshi.bdf" { { 608 40 208 624 "1khz" "" } { 432 64 120 448 "1khz" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "1khz" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "1khz register register 74160:inst\|6 74160:inst\|8 275.03 MHz Internal " "Info: Clock \"1khz\" Internal fmax is restricted to 275.03 MHz between source register \"74160:inst\|6\" and destination register \"74160:inst\|8\"" { { "Info" "ITDB_CLOCK_TCH_TCL" "1.818 ns 1.818 ns 3.636 ns " "Info: fmax restricted to Clock High delay (1.818 ns) plus Clock Low delay (1.818 ns) : restricted to 3.636 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.287 ns + Longest register register " "Info: + Longest register to register delay is 1.287 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns 74160:inst\|6 1 REG LC_X6_Y26_N5 18 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X6_Y26_N5; Fanout = 18; REG Node = '74160:inst\|6'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "" { 74160:inst|6 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 64 1032 1096 144 "6" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.680 ns) + CELL(0.607 ns) 1.287 ns 74160:inst\|8 2 REG LC_X6_Y26_N3 12 " "Info: 2: + IC(0.680 ns) + CELL(0.607 ns) = 1.287 ns; Loc. = LC_X6_Y26_N3; Fanout = 12; REG Node = '74160:inst\|8'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "1.287 ns" { 74160:inst|6 74160:inst|8 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 544 1032 1096 624 "8" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.607 ns 47.16 % " "Info: Total cell delay = 0.607 ns ( 47.16 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.680 ns 52.84 % " "Info: Total interconnect delay = 0.680 ns ( 52.84 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "1.287 ns" { 74160:inst|6 74160:inst|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.287 ns" { 74160:inst|6 74160:inst|8 } { 0.000ns 0.680ns } { 0.000ns 0.607ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "1khz destination 3.245 ns + Shortest register " "Info: + Shortest clock path from clock \"1khz\" to destination register is 3.245 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns 1khz 1 CLK PIN_29 3 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 3; CLK Node = '1khz'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "" { 1khz } "NODE_NAME" } "" } } { "xianshi.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/xianshi.bdf" { { 608 40 208 624 "1khz" "" } { 432 64 120 448 "1khz" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.065 ns) + CELL(0.711 ns) 3.245 ns 74160:inst\|8 2 REG LC_X6_Y26_N3 12 " "Info: 2: + IC(1.065 ns) + CELL(0.711 ns) = 3.245 ns; Loc. = LC_X6_Y26_N3; Fanout = 12; REG Node = '74160:inst\|8'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "1.776 ns" { 1khz 74160:inst|8 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 544 1032 1096 624 "8" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 67.18 % " "Info: Total cell delay = 2.180 ns ( 67.18 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.065 ns 32.82 % " "Info: Total interconnect delay = 1.065 ns ( 32.82 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.245 ns" { 1khz 74160:inst|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.245 ns" { 1khz 1khz~out0 74160:inst|8 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "1khz source 3.245 ns - Longest register " "Info: - Longest clock path from clock \"1khz\" to source register is 3.245 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns 1khz 1 CLK PIN_29 3 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 3; CLK Node = '1khz'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "" { 1khz } "NODE_NAME" } "" } } { "xianshi.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/xianshi.bdf" { { 608 40 208 624 "1khz" "" } { 432 64 120 448 "1khz" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.065 ns) + CELL(0.711 ns) 3.245 ns 74160:inst\|6 2 REG LC_X6_Y26_N5 18 " "Info: 2: + IC(1.065 ns) + CELL(0.711 ns) = 3.245 ns; Loc. = LC_X6_Y26_N5; Fanout = 18; REG Node = '74160:inst\|6'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "1.776 ns" { 1khz 74160:inst|6 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 64 1032 1096 144 "6" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 67.18 % " "Info: Total cell delay = 2.180 ns ( 67.18 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.065 ns 32.82 % " "Info: Total interconnect delay = 1.065 ns ( 32.82 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.245 ns" { 1khz 74160:inst|6 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.245 ns" { 1khz 1khz~out0 74160:inst|6 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.245 ns" { 1khz 74160:inst|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.245 ns" { 1khz 1khz~out0 74160:inst|8 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.711ns } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.245 ns" { 1khz 74160:inst|6 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.245 ns" { 1khz 1khz~out0 74160:inst|6 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 64 1032 1096 144 "6" "" } } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 544 1032 1096 624 "8" "" } } } }  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "1.287 ns" { 74160:inst|6 74160:inst|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.287 ns" { 74160:inst|6 74160:inst|8 } { 0.000ns 0.680ns } { 0.000ns 0.607ns } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.245 ns" { 1khz 74160:inst|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.245 ns" { 1khz 1khz~out0 74160:inst|8 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.711ns } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.245 ns" { 1khz 74160:inst|6 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.245 ns" { 1khz 1khz~out0 74160:inst|6 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "" { 74160:inst|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { 74160:inst|8 } {  } {  } } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 544 1032 1096 624 "8" "" } } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "1khz n4 74160:inst\|6 14.016 ns register " "Info: tco from clock \"1khz\" to destination pin \"n4\" through register \"74160:inst\|6\" is 14.016 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "1khz source 3.245 ns + Longest register " "Info: + Longest clock path from clock \"1khz\" to source register is 3.245 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns 1khz 1 CLK PIN_29 3 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 3; CLK Node = '1khz'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "" { 1khz } "NODE_NAME" } "" } } { "xianshi.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/xianshi.bdf" { { 608 40 208 624 "1khz" "" } { 432 64 120 448 "1khz" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.065 ns) + CELL(0.711 ns) 3.245 ns 74160:inst\|6 2 REG LC_X6_Y26_N5 18 " "Info: 2: + IC(1.065 ns) + CELL(0.711 ns) = 3.245 ns; Loc. = LC_X6_Y26_N5; Fanout = 18; REG Node = '74160:inst\|6'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "1.776 ns" { 1khz 74160:inst|6 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 64 1032 1096 144 "6" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 67.18 % " "Info: Total cell delay = 2.180 ns ( 67.18 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.065 ns 32.82 % " "Info: Total interconnect delay = 1.065 ns ( 32.82 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.245 ns" { 1khz 74160:inst|6 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.245 ns" { 1khz 1khz~out0 74160:inst|6 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 64 1032 1096 144 "6" "" } } } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.547 ns + Longest register pin " "Info: + Longest register to pin delay is 10.547 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns 74160:inst\|6 1 REG LC_X6_Y26_N5 18 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X6_Y26_N5; Fanout = 18; REG Node = '74160:inst\|6'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "" { 74160:inst|6 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 64 1032 1096 144 "6" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.998 ns) + CELL(0.442 ns) 2.440 ns 74151:inst6\|f74151:sub\|81~134 2 COMB LC_X1_Y24_N3 1 " "Info: 2: + IC(1.998 ns) + CELL(0.442 ns) = 2.440 ns; Loc. = LC_X1_Y24_N3; Fanout = 1; COMB Node = '74151:inst6\|f74151:sub\|81~134'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "2.440 ns" { 74160:inst|6 74151:inst6|f74151:sub|81~134 } "NODE_NAME" } "" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/f74151.bdf" { { 448 808 872 488 "81" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.420 ns) + CELL(0.114 ns) 2.974 ns 74151:inst6\|f74151:sub\|81~135 3 COMB LC_X1_Y24_N6 1 " "Info: 3: + IC(0.420 ns) + CELL(0.114 ns) = 2.974 ns; Loc. = LC_X1_Y24_N6; Fanout = 1; COMB Node = '74151:inst6\|f74151:sub\|81~135'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "0.534 ns" { 74151:inst6|f74151:sub|81~134 74151:inst6|f74151:sub|81~135 } "NODE_NAME" } "" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/f74151.bdf" { { 448 808 872 488 "81" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.493 ns) + CELL(0.590 ns) 5.057 ns 74151:inst6\|f74151:sub\|81~137 4 COMB LC_X6_Y26_N9 7 " "Info: 4: + IC(1.493 ns) + CELL(0.590 ns) = 5.057 ns; Loc. = LC_X6_Y26_N9; Fanout = 7; COMB Node = '74151:inst6\|f74151:sub\|81~137'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "2.083 ns" { 74151:inst6|f74151:sub|81~135 74151:inst6|f74151:sub|81~137 } "NODE_NAME" } "" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/f74151.bdf" { { 448 808 872 488 "81" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.239 ns) + CELL(0.590 ns) 6.886 ns 7447:inst9\|85 5 COMB LC_X4_Y26_N4 1 " "Info: 5: + IC(1.239 ns) + CELL(0.590 ns) = 6.886 ns; Loc. = LC_X4_Y26_N4; Fanout = 1; COMB Node = '7447:inst9\|85'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "1.829 ns" { 74151:inst6|f74151:sub|81~137 7447:inst9|85 } "NODE_NAME" } "" } } { "7447.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7447.bdf" { { 720 680 744 760 "85" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.553 ns) + CELL(2.108 ns) 10.547 ns n4 6 PIN PIN_239 0 " "Info: 6: + IC(1.553 ns) + CELL(2.108 ns) = 10.547 ns; Loc. = PIN_239; Fanout = 0; PIN Node = 'n4'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.661 ns" { 7447:inst9|85 n4 } "NODE_NAME" } "" } } { "xianshi.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/xianshi.bdf" { { 592 368 544 608 "n4" "" } { 368 784 808 384 "n4" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.844 ns 36.45 % " "Info: Total cell delay = 3.844 ns ( 36.45 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.703 ns 63.55 % " "Info: Total interconnect delay = 6.703 ns ( 63.55 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "10.547 ns" { 74160:inst|6 74151:inst6|f74151:sub|81~134 74151:inst6|f74151:sub|81~135 74151:inst6|f74151:sub|81~137 7447:inst9|85 n4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.547 ns" { 74160:inst|6 74151:inst6|f74151:sub|81~134 74151:inst6|f74151:sub|81~135 74151:inst6|f74151:sub|81~137 7447:inst9|85 n4 } { 0.000ns 1.998ns 0.420ns 1.493ns 1.239ns 1.553ns } { 0.000ns 0.442ns 0.114ns 0.590ns 0.590ns 2.108ns } } }  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "3.245 ns" { 1khz 74160:inst|6 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.245 ns" { 1khz 1khz~out0 74160:inst|6 } { 0.000ns 0.000ns 1.065ns } { 0.000ns 1.469ns 0.711ns } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh_cmp.qrpt" Compiler "shzzh" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/db/shzzh.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/新建文件夹/shzzh/" "" "10.547 ns" { 74160:inst|6 74151:inst6|f74151:sub|81~134 74151:inst6|f74151:sub|81~135 74151:inst6|f74151:sub|81~137 7447:inst9|85 n4 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.547 ns" { 74160:inst|6 74151:inst6|f74151:sub|81~134 74151:inst6|f74151:sub|81~135 74151:inst6|f74151:sub|81~137 7447:inst9|85 n4 } { 0.000ns 1.998ns 0.420ns 1.493ns 1.239ns 1.553ns } { 0.000ns 0.442ns 0.114ns 0.590ns 0.590ns 2.108ns } } }  } 0}