shzzh.map.eqn

利用数字电路知识

-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--B1_7 is 74160:inst|7
--operation mode is normal

B1_7_lut_out = B1_7 & (!B1_6) # !B1_7 & !B1_8 & B1_6;
B1_7 = DFFEAS(B1_7_lut_out, 1khz, VCC, , , , , , );


--B1_6 is 74160:inst|6
--operation mode is normal

B1_6_lut_out = !B1_6;
B1_6 = DFFEAS(B1_6_lut_out, 1khz, VCC, , , , , , );


--B1_8 is 74160:inst|8
--operation mode is normal

B1_8_lut_out = B1_6 & !B1_8 & (B1_7) # !B1_6 & B1_8;
B1_8 = DFFEAS(B1_8_lut_out, 1khz, VCC, , , , , , );


--E1L1 is 74138:inst11|15~69
--operation mode is normal

E1L1 = !B1_7 & !B1_6 & !B1_8;


--E1L2 is 74138:inst11|15~70
--operation mode is normal

E1L2 = B1_6 & (!B1_7 & !B1_8);


--E1L3 is 74138:inst11|15~71
--operation mode is normal

E1L3 = B1_7 & (!B1_6 & !B1_8);


--E1L4 is 74138:inst11|15~72
--operation mode is normal

E1L4 = B1_7 & B1_6 & (!B1_8);


--E1L5 is 74138:inst11|15~73
--operation mode is normal

E1L5 = B1_8 & (!B1_7 & !B1_6);


--E1L6 is 74138:inst11|15~74
--operation mode is normal

E1L6 = B1_6 & B1_8 & (!B1_7);


--F3L1 is 74151:inst6|f74151:sub|81~134
--operation mode is normal

F3L1 = B1_7 & (B1_6) # !B1_7 & (B1_6 & ms[1] # !B1_6 & (mg[1]));


--F3L2 is 74151:inst6|f74151:sub|81~135
--operation mode is normal

F3L2 = B1_7 & (F3L1 & (fs[1]) # !F3L1 & fg[1]) # !B1_7 & (F3L1);


--F3L3 is 74151:inst6|f74151:sub|81~136
--operation mode is normal

F3L3 = B1_6 & ss[1] # !B1_6 & (sg[1]);


--F3L4 is 74151:inst6|f74151:sub|81~137
--operation mode is normal

F3L4 = B1_8 & (F3L3 & !B1_7) # !B1_8 & F3L2;


--F1L1 is 74151:inst4|f74151:sub|81~118
--operation mode is normal

F1L1 = B1_7 & (B1_6) # !B1_7 & (B1_6 & ms[3] # !B1_6 & (mg[3]));


--F1L2 is 74151:inst4|f74151:sub|81~119
--operation mode is normal

F1L2 = B1_7 & (F1L1 & (fs[3]) # !F1L1 & fg[3]) # !B1_7 & (F1L1);


--F1L3 is 74151:inst4|f74151:sub|81~120
--operation mode is normal

F1L3 = B1_6 & ss[3] # !B1_6 & (sg[3]);


--F1L4 is 74151:inst4|f74151:sub|81~121
--operation mode is normal

F1L4 = B1_8 & (F1L3 & !B1_7) # !B1_8 & F1L2;


--F2L1 is 74151:inst5|f74151:sub|81~114
--operation mode is normal

F2L1 = B1_7 & (B1_6) # !B1_7 & (B1_6 & ms[2] # !B1_6 & (mg[2]));


--F2L2 is 74151:inst5|f74151:sub|81~115
--operation mode is normal

F2L2 = B1_7 & (F2L1 & (fs[2]) # !F2L1 & fg[2]) # !B1_7 & (F2L1);


--F2L3 is 74151:inst5|f74151:sub|81~116
--operation mode is normal

F2L3 = B1_6 & ss[2] # !B1_6 & (sg[2]);


--F2L4 is 74151:inst5|f74151:sub|81~117
--operation mode is normal

F2L4 = B1_8 & (F2L3 & !B1_7) # !B1_8 & F2L2;


--F4L1 is 74151:inst7|f74151:sub|81~144
--operation mode is normal

F4L1 = B1_6 & (B1_7) # !B1_6 & (B1_7 & fg[0] # !B1_7 & (mg[0]));


--F4L2 is 74151:inst7|f74151:sub|81~145
--operation mode is normal

F4L2 = B1_6 & (F4L1 & (fs[0]) # !F4L1 & ms[0]) # !B1_6 & (F4L1);


--F4L3 is 74151:inst7|f74151:sub|81~146
--operation mode is normal

F4L3 = B1_6 & ss[0] # !B1_6 & (sg[0]);


--F4L4 is 74151:inst7|f74151:sub|81~147
--operation mode is normal

F4L4 = B1_8 & (F4L3 & !B1_7) # !B1_8 & F4L2;


--D1L1 is 7447:inst9|81~55
--operation mode is normal

D1L1 = F3L4 & (F1L4 # F2L4 & !F4L4) # !F3L4 & (F2L4 & (!F4L4) # !F2L4 & !F1L4 & F4L4);


--D1L2 is 7447:inst9|82~214
--operation mode is normal

D1L2 = F3L4 & (F1L4 # F2L4 & !F4L4) # !F3L4 & (F2L4 & F4L4);


--D1_83 is 7447:inst9|83
--operation mode is normal

D1_83 = F2L4 & F1L4 # !F2L4 & (F3L4 & !F4L4);


--D1L4 is 7447:inst9|84~219
--operation mode is normal

D1L4 = F4L4 & (F2L4 $ !F3L4) # !F4L4 & F2L4 & !F3L4;


--D1_85 is 7447:inst9|85
--operation mode is normal

D1_85 = F4L4 # F2L4 & (!F3L4);


--D1L6 is 7447:inst9|86~207
--operation mode is normal

D1L6 = F3L4 & (F4L4 # !F2L4) # !F3L4 & F4L4 & !F1L4 & !F2L4;


--D1_87 is 7447:inst9|87
--operation mode is normal

D1_87 = F3L4 & F4L4 & F2L4 # !F3L4 & (!F2L4 & !F1L4);


--fg[1] is fg[1]
--operation mode is input

fg[1] = INPUT();


--ms[1] is ms[1]
--operation mode is input

ms[1] = INPUT();


--mg[1] is mg[1]
--operation mode is input

mg[1] = INPUT();


--fs[1] is fs[1]
--operation mode is input

fs[1] = INPUT();


--ss[1] is ss[1]
--operation mode is input

ss[1] = INPUT();


--sg[1] is sg[1]
--operation mode is input

sg[1] = INPUT();


--fg[3] is fg[3]
--operation mode is input

fg[3] = INPUT();


--ms[3] is ms[3]
--operation mode is input

ms[3] = INPUT();


--mg[3] is mg[3]
--operation mode is input

mg[3] = INPUT();


--fs[3] is fs[3]
--operation mode is input

fs[3] = INPUT();


--ss[3] is ss[3]
--operation mode is input

ss[3] = INPUT();


--sg[3] is sg[3]
--operation mode is input

sg[3] = INPUT();


--fg[2] is fg[2]
--operation mode is input

fg[2] = INPUT();


--ms[2] is ms[2]
--operation mode is input

ms[2] = INPUT();


--mg[2] is mg[2]
--operation mode is input

mg[2] = INPUT();


--fs[2] is fs[2]
--operation mode is input

fs[2] = INPUT();


--ss[2] is ss[2]
--operation mode is input

ss[2] = INPUT();


--sg[2] is sg[2]
--operation mode is input

sg[2] = INPUT();


--ms[0] is ms[0]
--operation mode is input

ms[0] = INPUT();


--fg[0] is fg[0]
--operation mode is input

fg[0] = INPUT();


--mg[0] is mg[0]
--operation mode is input

mg[0] = INPUT();


--fs[0] is fs[0]
--operation mode is input

fs[0] = INPUT();


--ss[0] is ss[0]
--operation mode is input

ss[0] = INPUT();


--sg[0] is sg[0]
--operation mode is input

sg[0] = INPUT();


--1khz is 1khz
--operation mode is input

1khz = INPUT();


--m0 is m0
--operation mode is output

m0 = OUTPUT(!E1L1);


--m1 is m1
--operation mode is output

m1 = OUTPUT(!E1L2);


--m2 is m2
--operation mode is output

m2 = OUTPUT(!E1L3);


--m3 is m3
--operation mode is output

m3 = OUTPUT(!E1L4);


--m4 is m4
--operation mode is output

m4 = OUTPUT(!E1L5);


--m5 is m5
--operation mode is output

m5 = OUTPUT(!E1L6);


--n0 is n0
--operation mode is output

n0 = OUTPUT(D1L1);


--n1 is n1
--operation mode is output

n1 = OUTPUT(D1L2);


--n2 is n2
--operation mode is output

n2 = OUTPUT(D1_83);


--n3 is n3
--operation mode is output

n3 = OUTPUT(D1L4);


--n4 is n4
--operation mode is output

n4 = OUTPUT(D1_85);


--n5 is n5
--operation mode is output

n5 = OUTPUT(D1L6);


--n6 is n6
--operation mode is output

n6 = OUTPUT(D1_87);