dds.map.eqn

直接数字频率合成

R01_50 = R01_6 & L1L2 & (!R01_9);


--R8L7 is cepin:inst11|74160:inst1|49~31
--operation mode is normal

R8L7 = R8_6 & (!R8_9);


--R11_50 is cepin:inst11|74160:inst4|50
--operation mode is normal

R11_50 = R11L7 & (!R11_9);


--L1L4 is cepin:inst11|inst10~16
--operation mode is normal

L1L4 = R01_6 & L1L2;


--R2L5 is mo48:inst1|74160:inst4|13~150
--operation mode is normal

R2L5 = !R1_9 # !R2_6 # !R1_6;


--R2L6 is mo48:inst1|74160:inst4|13~151
--operation mode is normal

R2L6 = R2_9 & R2L5 & (!C1L1);


--T4_87 is fenpin:inst2|74161:inst3|f74161:sub|87
--operation mode is arithmetic

T4_87_carry_eqn = T4_81;
T4_87_lut_out = T4_87 $ (T4_87_carry_eqn);
T4_87 = DFFEAS(T4_87_lut_out, R2_8, VCC, , , , , , );

--T4_85 is fenpin:inst2|74161:inst3|f74161:sub|85
--operation mode is arithmetic

T4_85 = CARRY(!T4_81 # !T4_87);


--T4_9 is fenpin:inst2|74161:inst3|f74161:sub|9
--operation mode is arithmetic

T4_9_carry_eqn = T3_105;
T4_9_lut_out = T4_9 $ (!T4_9_carry_eqn);
T4_9 = DFFEAS(T4_9_lut_out, R2_8, VCC, , , , , , );

--T4_81 is fenpin:inst2|74161:inst3|f74161:sub|81
--operation mode is arithmetic

T4_81 = CARRY(T4_9 & (!T3_105));


--T1_110 is fenpin:inst2|74161:inst|f74161:sub|110
--operation mode is arithmetic

T1_110_carry_eqn = T1_95;
T1_110_lut_out = T1_110 $ (T1_110_carry_eqn);
T1_110 = DFFEAS(T1_110_lut_out, R2_8, VCC, , , , , , );

--T1_105 is fenpin:inst2|74161:inst|f74161:sub|105
--operation mode is arithmetic

T1_105 = CARRY(!T1_95 # !T1_110);


--T1_99 is fenpin:inst2|74161:inst|f74161:sub|99
--operation mode is arithmetic

T1_99_carry_eqn = T1_85;
T1_99_lut_out = T1_99 $ (!T1_99_carry_eqn);
T1_99 = DFFEAS(T1_99_lut_out, R2_8, VCC, , , , , , );

--T1_95 is fenpin:inst2|74161:inst|f74161:sub|95
--operation mode is arithmetic

T1_95 = CARRY(T1_99 & (!T1_85));


--T3_110 is fenpin:inst2|74161:inst2|f74161:sub|110
--operation mode is arithmetic

T3_110_carry_eqn = T3_95;
T3_110_lut_out = T3_110 $ (T3_110_carry_eqn);
T3_110 = DFFEAS(T3_110_lut_out, R2_8, VCC, , , , , , );

--T3_105 is fenpin:inst2|74161:inst2|f74161:sub|105
--operation mode is arithmetic

T3_105 = CARRY(!T3_95 # !T3_110);


--T1_87 is fenpin:inst2|74161:inst|f74161:sub|87
--operation mode is arithmetic

T1_87_carry_eqn = T1_81;
T1_87_lut_out = T1_87 $ (T1_87_carry_eqn);
T1_87 = DFFEAS(T1_87_lut_out, R2_8, VCC, , , , , , );

--T1_85 is fenpin:inst2|74161:inst|f74161:sub|85
--operation mode is arithmetic

T1_85 = CARRY(!T1_81 # !T1_87);


--T3_99 is fenpin:inst2|74161:inst2|f74161:sub|99
--operation mode is arithmetic

T3_99_carry_eqn = T3_85;
T3_99_lut_out = T3_99 $ (!T3_99_carry_eqn);
T3_99 = DFFEAS(T3_99_lut_out, R2_8, VCC, , , , , , );

--T3_95 is fenpin:inst2|74161:inst2|f74161:sub|95
--operation mode is arithmetic

T3_95 = CARRY(T3_99 & (!T3_85));


--T1_9 is fenpin:inst2|74161:inst|f74161:sub|9
--operation mode is arithmetic

T1_9_carry_eqn = T5_105;
T1_9_lut_out = T1_9 $ (!T1_9_carry_eqn);
T1_9 = DFFEAS(T1_9_lut_out, R2_8, VCC, , , , , , );

--T1_81 is fenpin:inst2|74161:inst|f74161:sub|81
--operation mode is arithmetic

T1_81 = CARRY(T1_9 & (!T5_105));


--T3_87 is fenpin:inst2|74161:inst2|f74161:sub|87
--operation mode is arithmetic

T3_87_carry_eqn = T3_81;
T3_87_lut_out = T3_87 $ (T3_87_carry_eqn);
T3_87 = DFFEAS(T3_87_lut_out, R2_8, VCC, , , , , , );

--T3_85 is fenpin:inst2|74161:inst2|f74161:sub|85
--operation mode is arithmetic

T3_85 = CARRY(!T3_81 # !T3_87);


--T3_9 is fenpin:inst2|74161:inst2|f74161:sub|9
--operation mode is arithmetic

T3_9_carry_eqn = T2_105;
T3_9_lut_out = T3_9 $ (!T3_9_carry_eqn);
T3_9 = DFFEAS(T3_9_lut_out, R2_8, VCC, , , , , , );

--T3_81 is fenpin:inst2|74161:inst2|f74161:sub|81
--operation mode is arithmetic

T3_81 = CARRY(T3_9 & (!T2_105));


--T5_110 is fenpin:inst2|74161:inst4|f74161:sub|110
--operation mode is arithmetic

T5_110_carry_eqn = T5_95;
T5_110_lut_out = T5_110 $ (T5_110_carry_eqn);
T5_110 = DFFEAS(T5_110_lut_out, R2_8, VCC, , , , , , );

--T5_105 is fenpin:inst2|74161:inst4|f74161:sub|105
--operation mode is arithmetic

T5_105 = CARRY(!T5_95 # !T5_110);


--T5_99 is fenpin:inst2|74161:inst4|f74161:sub|99
--operation mode is arithmetic

T5_99_carry_eqn = T5_85;
T5_99_lut_out = T5_99 $ (!T5_99_carry_eqn);
T5_99 = DFFEAS(T5_99_lut_out, R2_8, VCC, , , , , , );

--T5_95 is fenpin:inst2|74161:inst4|f74161:sub|95
--operation mode is arithmetic

T5_95 = CARRY(T5_99 & (!T5_85));


--T2_110 is fenpin:inst2|74161:inst1|f74161:sub|110
--operation mode is arithmetic

T2_110_carry_eqn = T2_95;
T2_110_lut_out = T2_110 $ (T2_110_carry_eqn);
T2_110 = DFFEAS(T2_110_lut_out, R2_8, VCC, , , , , , );

--T2_105 is fenpin:inst2|74161:inst1|f74161:sub|105
--operation mode is arithmetic

T2_105 = CARRY(!T2_95 # !T2_110);


--T5_87 is fenpin:inst2|74161:inst4|f74161:sub|87
--operation mode is arithmetic

T5_87_carry_eqn = T5_81;
T5_87_lut_out = T5_87 $ (T5_87_carry_eqn);
T5_87 = DFFEAS(T5_87_lut_out, R2_8, VCC, , , , , , );

--T5_85 is fenpin:inst2|74161:inst4|f74161:sub|85
--operation mode is arithmetic

T5_85 = CARRY(!T5_81 # !T5_87);


--T2_99 is fenpin:inst2|74161:inst1|f74161:sub|99
--operation mode is arithmetic

T2_99_carry_eqn = T2_85;
T2_99_lut_out = T2_99 $ (!T2_99_carry_eqn);
T2_99 = DFFEAS(T2_99_lut_out, R2_8, VCC, , , , , , );

--T2_95 is fenpin:inst2|74161:inst1|f74161:sub|95
--operation mode is arithmetic

T2_95 = CARRY(T2_99 & (!T2_85));


--T5_9 is fenpin:inst2|74161:inst4|f74161:sub|9
--operation mode is arithmetic

T5_9_lut_out = !T5_9;
T5_9 = DFFEAS(T5_9_lut_out, R2_8, VCC, , , , , , );

--T5_81 is fenpin:inst2|74161:inst4|f74161:sub|81
--operation mode is arithmetic

T5_81 = CARRY(T5_9);


--R4L7 is kpzi:inst9|74160:inst1|50~12
--operation mode is normal

R4L7 = R4_6 & R4L6 & (!R3_6 # !R3_8);


--R5L7 is kpzi:inst9|74160:inst2|50~12
--operation mode is normal

R5L7 = R5_6 & R5L6 & (!R6_6 # !R6_8);


--cpz is cpz
--operation mode is input

cpz = INPUT();


--ke3 is ke3
--operation mode is input

ke3 = INPUT();


--ke2 is ke2
--operation mode is input

ke2 = INPUT();


--ke1 is ke1
--operation mode is input

ke1 = INPUT();


--mode1 is mode1
--operation mode is output

mode1 = OUTPUT(VCC);


--mode2 is mode2
--operation mode is output

mode2 = OUTPUT(GND);


--daclk is daclk
--operation mode is output

daclk = OUTPUT(!R2_8);


--cos[9] is cos[9]
--operation mode is output

cos[9] = OUTPUT(N1L01);


--cos[8] is cos[8]
--operation mode is output

cos[8] = OUTPUT(N1L9);


--cos[7] is cos[7]
--operation mode is output

cos[7] = OUTPUT(N1L7);


--cos[6] is cos[6]
--operation mode is output

cos[6] = OUTPUT(N1L6);


--cos[5] is cos[5]
--operation mode is output

cos[5] = OUTPUT(N1L5);


--cos[4] is cos[4]
--operation mode is output

cos[4] = OUTPUT(N1L4);


--cos[3] is cos[3]
--operation mode is output

cos[3] = OUTPUT(N1L3);


--cos[2] is cos[2]
--operation mode is output

cos[2] = OUTPUT(N1L2);


--cos[1] is cos[1]
--operation mode is output

cos[1] = OUTPUT(N1L1);


--cos[0] is cos[0]
--operation mode is output

cos[0] = OUTPUT(BB1_q_a[0]);


--dig[7] is dig[7]
--operation mode is output

dig[7] = OUTPUT(!Z1L1);


--dig[6] is dig[6]
--operation mode is output

dig[6] = OUTPUT(!Z1L2);


--dig[5] is dig[5]
--operation mode is output

dig[5] = OUTPUT(!Z1L3);


--dig[4] is dig[4]
--operation mode is output

dig[4] = OUTPUT(!Z1L4);


--dig[3] is dig[3]
--operation mode is output

dig[3] = OUTPUT(!Z1L5);


--dig[2] is dig[2]
--operation mode is output

dig[2] = OUTPUT(!Z1L6);


--dig[1] is dig[1]
--operation mode is output

dig[1] = OUTPUT(!Z1L7);


--dig[0] is dig[0]
--operation mode is output

dig[0] = OUTPUT(!Z1L8);


--seg[6] is seg[6]
--operation mode is output

seg[6] = OUTPUT(Y1_87);


--seg[5] is seg[5]
--operation mode is output

seg[5] = OUTPUT(Y1L6);


--seg[4] is seg[4]
--operation mode is output

seg[4] = OUTPUT(Y1_85);


--seg[3] is seg[3]
--operation mode is output

seg[3] = OUTPUT(Y1L4);


--seg[2] is seg[2]
--operation mode is output

seg[2] = OUTPUT(Y1_83);


--seg[1] is seg[1]
--operation mode is output

seg[1] = OUTPUT(Y1L2);


--seg[0] is seg[0]
--operation mode is output

seg[0] = OUTPUT(Y1L1);


--sin[9] is sin[9]
--operation mode is output

sin[9] = OUTPUT(V1_q_a[9]);


--sin[8] is sin[8]
--operation mode is output

sin[8] = OUTPUT(V1_q_a[8]);


--sin[7] is sin[7]
--operation mode is output

sin[7] = OUTPUT(V1_q_a[7]);


--sin[6] is sin[6]
--operation mode is output

sin[6] = OUTPUT(V1_q_a[6]);


--sin[5] is sin[5]
--operation mode is output

sin[5] = OUTPUT(V1_q_a[5]);


--sin[4] is sin[4]
--operation mode is output

sin[4] = OUTPUT(V1_q_a[4]);


--sin[3] is sin[3]
--operation mode is output

sin[3] = OUTPUT(V1_q_a[3]);


--sin[2] is sin[2]
--operation mode is output

sin[2] = OUTPUT(V1_q_a[2]);


--sin[1] is sin[1]
--operation mode is output

sin[1] = OUTPUT(V1_q_a[1]);


--sin[0] is sin[0]
--operation mode is output

sin[0] = OUTPUT(V1_q_a[0]);