dds.fit.eqn

直接数字频率合成

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--R2_8 is mo48:inst1|74160:inst4|8 at LC_X8_Y13_N9
--operation mode is normal

R2_8_lut_out = C1L1 & R2_7 & (R2L7) # !C1L1 & (R2_8 $ (R2_7 & R2L7));
R2_8 = DFFEAS(R2_8_lut_out, GLOBAL(cpz), VCC, , , , , , );


--BB1_q_a[9] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[9] at M4K_X19_Y8
--RAM Block Operation Mode: ROM
--Port A Depth: 2048, Port A Width: 2
--Port A Logical Depth: 2048, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
BB1_q_a[9]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[9]_PORT_A_address_reg = DFFE(BB1_q_a[9]_PORT_A_address, BB1_q_a[9]_clock_0, , , );
BB1_q_a[9]_clock_0 = GLOBAL(R2_8);
BB1_q_a[9]_PORT_A_data_out = MEMORY(, , BB1_q_a[9]_PORT_A_address_reg, , , , , , BB1_q_a[9]_clock_0, , , , , );
BB1_q_a[9]_PORT_A_data_out_reg = DFFE(BB1_q_a[9]_PORT_A_data_out, BB1_q_a[9]_clock_0, , , );
BB1_q_a[9] = BB1_q_a[9]_PORT_A_data_out_reg[0];

--BB1_q_a[7] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[7] at M4K_X19_Y8
BB1_q_a[9]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[9]_PORT_A_address_reg = DFFE(BB1_q_a[9]_PORT_A_address, BB1_q_a[9]_clock_0, , , );
BB1_q_a[9]_clock_0 = GLOBAL(R2_8);
BB1_q_a[9]_PORT_A_data_out = MEMORY(, , BB1_q_a[9]_PORT_A_address_reg, , , , , , BB1_q_a[9]_clock_0, , , , , );
BB1_q_a[9]_PORT_A_data_out_reg = DFFE(BB1_q_a[9]_PORT_A_data_out, BB1_q_a[9]_clock_0, , , );
BB1_q_a[7] = BB1_q_a[9]_PORT_A_data_out_reg[1];


--W3_6 is leijiaqi2:inst6|74173:inst5|6 at LC_X38_Y13_N5
--operation mode is normal

W3_6_lut_out = !W3_6;
W3_6 = DFFEAS(W3_6_lut_out, GLOBAL(R2_8), VCC, , Q6L1, , , , );


--T7_110 is binarykpzi:inst8|74161:inst7|f74161:sub|110 at LC_X21_Y9_N4
--operation mode is normal

T7_110_lut_out = T7_110 $ !T7_95;
T7_110 = DFFEAS(T7_110_lut_out, GLOBAL(T4_110), VCC, , , , , , );


--Q3L3 is adderpprom:inst|7483:inst2|45~255 at LC_X22_Y9_N7
--operation mode is normal

Q3L3 = W3_6 $ T7_110;


--W3_7 is leijiaqi2:inst6|74173:inst5|7 at LC_X21_Y9_N7
--operation mode is normal

W3_7_lut_out = !W3_7;
W3_7 = DFFEAS(W3_7_lut_out, GLOBAL(R2_8), VCC, , Q6L2, , , , );


--T7_99 is binarykpzi:inst8|74161:inst7|f74161:sub|99 at LC_X21_Y9_N3
--operation mode is arithmetic

T7_99_lut_out = T7_99 $ T7_85;
T7_99 = DFFEAS(T7_99_lut_out, GLOBAL(T4_110), VCC, , , , , , );

--T7_95 is binarykpzi:inst8|74161:inst7|f74161:sub|95 at LC_X21_Y9_N3
--operation mode is arithmetic

T7_95_cout_0 = !T7_85 # !T7_99;
T7_95 = CARRY(T7_95_cout_0);

--T7L11 is binarykpzi:inst8|74161:inst7|f74161:sub|95~COUT1_2 at LC_X21_Y9_N3
--operation mode is arithmetic

T7L11_cout_1 = !T7L8 # !T7_99;
T7L11 = CARRY(T7L11_cout_1);


--W3_8 is leijiaqi2:inst6|74173:inst5|8 at LC_X22_Y9_N4
--operation mode is normal

W3_8_lut_out = !W3_8;
W3_8 = DFFEAS(W3_8_lut_out, GLOBAL(R2_8), VCC, , Q6L3, , , , );


--T7_87 is binarykpzi:inst8|74161:inst7|f74161:sub|87 at LC_X21_Y9_N2
--operation mode is arithmetic

T7_87_lut_out = T7_87 $ (!T7_81);
T7_87 = DFFEAS(T7_87_lut_out, GLOBAL(T4_110), VCC, , , , , , );

--T7_85 is binarykpzi:inst8|74161:inst7|f74161:sub|85 at LC_X21_Y9_N2
--operation mode is arithmetic

T7_85_cout_0 = T7_87 & (!T7_81);
T7_85 = CARRY(T7_85_cout_0);

--T7L8 is binarykpzi:inst8|74161:inst7|f74161:sub|85~COUT1_2 at LC_X21_Y9_N2
--operation mode is arithmetic

T7L8_cout_1 = T7_87 & (!T7L3);
T7L8 = CARRY(T7L8_cout_1);


--W3_9 is leijiaqi2:inst6|74173:inst5|9 at LC_X22_Y9_N8
--operation mode is normal

W3_9_lut_out = !W3_9;
W3_9 = DFFEAS(W3_9_lut_out, GLOBAL(R2_8), VCC, , Q5_2, , , , );


--T7_9 is binarykpzi:inst8|74161:inst7|f74161:sub|9 at LC_X21_Y9_N1
--operation mode is arithmetic

T7_9_lut_out = T7_9 $ (T7_82);
T7_9 = DFFEAS(T7_9_lut_out, GLOBAL(T4_110), VCC, , , , , , );

--T7_81 is binarykpzi:inst8|74161:inst7|f74161:sub|81 at LC_X21_Y9_N1
--operation mode is arithmetic

T7_81_cout_0 = !T7_82 # !T7_9;
T7_81 = CARRY(T7_81_cout_0);

--T7L3 is binarykpzi:inst8|74161:inst7|f74161:sub|81~COUT1 at LC_X21_Y9_N1
--operation mode is arithmetic

T7L3_cout_1 = !T7L6 # !T7_9;
T7L3 = CARRY(T7L3_cout_1);


--Q3L4 is adderpprom:inst|7483:inst2|51~91 at LC_X22_Y9_N0
--operation mode is normal

Q3L4 = W3_8 & (T7_87 # T7_9 & W3_9) # !W3_8 & T7_9 & W3_9 & T7_87;


--Q3_45 is adderpprom:inst|7483:inst2|45 at LC_X22_Y9_N1
--operation mode is normal

Q3_45 = Q3L3 $ (W3_7 & !T7_99 & !Q3L4 # !W3_7 & (!Q3L4 # !T7_99));


--BB1_q_a[8] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[8] at M4K_X19_Y6
--RAM Block Operation Mode: ROM
--Port A Depth: 2048, Port A Width: 2
--Port A Logical Depth: 2048, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
BB1_q_a[8]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[8]_PORT_A_address_reg = DFFE(BB1_q_a[8]_PORT_A_address, BB1_q_a[8]_clock_0, , , );
BB1_q_a[8]_clock_0 = GLOBAL(R2_8);
BB1_q_a[8]_PORT_A_data_out = MEMORY(, , BB1_q_a[8]_PORT_A_address_reg, , , , , , BB1_q_a[8]_clock_0, , , , , );
BB1_q_a[8]_PORT_A_data_out_reg = DFFE(BB1_q_a[8]_PORT_A_data_out, BB1_q_a[8]_clock_0, , , );
BB1_q_a[8] = BB1_q_a[8]_PORT_A_data_out_reg[0];

--BB1_q_a[0] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[0] at M4K_X19_Y6
BB1_q_a[8]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[8]_PORT_A_address_reg = DFFE(BB1_q_a[8]_PORT_A_address, BB1_q_a[8]_clock_0, , , );
BB1_q_a[8]_clock_0 = GLOBAL(R2_8);
BB1_q_a[8]_PORT_A_data_out = MEMORY(, , BB1_q_a[8]_PORT_A_address_reg, , , , , , BB1_q_a[8]_clock_0, , , , , );
BB1_q_a[8]_PORT_A_data_out_reg = DFFE(BB1_q_a[8]_PORT_A_data_out, BB1_q_a[8]_clock_0, , , );
BB1_q_a[0] = BB1_q_a[8]_PORT_A_data_out_reg[1];


--N1L01 is choosebq:inst16|inst39~63 at LC_X17_Y8_N9
--operation mode is normal

N1L01 = BB1_q_a[9] $ (!Q3_45 & (BB1_q_a[8]));


--BB1_q_a[2] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[2] at M4K_X19_Y7
--RAM Block Operation Mode: ROM
--Port A Depth: 2048, Port A Width: 2
--Port A Logical Depth: 2048, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
BB1_q_a[2]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[2]_PORT_A_address_reg = DFFE(BB1_q_a[2]_PORT_A_address, BB1_q_a[2]_clock_0, , , );
BB1_q_a[2]_clock_0 = GLOBAL(R2_8);
BB1_q_a[2]_PORT_A_data_out = MEMORY(, , BB1_q_a[2]_PORT_A_address_reg, , , , , , BB1_q_a[2]_clock_0, , , , , );
BB1_q_a[2]_PORT_A_data_out_reg = DFFE(BB1_q_a[2]_PORT_A_data_out, BB1_q_a[2]_clock_0, , , );
BB1_q_a[2] = BB1_q_a[2]_PORT_A_data_out_reg[0];

--BB1_q_a[1] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[1] at M4K_X19_Y7
BB1_q_a[2]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[2]_PORT_A_address_reg = DFFE(BB1_q_a[2]_PORT_A_address, BB1_q_a[2]_clock_0, , , );
BB1_q_a[2]_clock_0 = GLOBAL(R2_8);
BB1_q_a[2]_PORT_A_data_out = MEMORY(, , BB1_q_a[2]_PORT_A_address_reg, , , , , , BB1_q_a[2]_clock_0, , , , , );
BB1_q_a[2]_PORT_A_data_out_reg = DFFE(BB1_q_a[2]_PORT_A_data_out, BB1_q_a[2]_clock_0, , , );
BB1_q_a[1] = BB1_q_a[2]_PORT_A_data_out_reg[1];


--Q7L1 is qufanjiayi:inst19|7483:inst|1~2 at LC_X17_Y8_N2
--operation mode is normal

Q7L1 = !BB1_q_a[0] & (!BB1_q_a[2] & !BB1_q_a[1]);


--BB1_q_a[4] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[4] at M4K_X19_Y9
--RAM Block Operation Mode: ROM
--Port A Depth: 2048, Port A Width: 2
--Port A Logical Depth: 2048, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
BB1_q_a[4]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[4]_PORT_A_address_reg = DFFE(BB1_q_a[4]_PORT_A_address, BB1_q_a[4]_clock_0, , , );
BB1_q_a[4]_clock_0 = GLOBAL(R2_8);
BB1_q_a[4]_PORT_A_data_out = MEMORY(, , BB1_q_a[4]_PORT_A_address_reg, , , , , , BB1_q_a[4]_clock_0, , , , , );
BB1_q_a[4]_PORT_A_data_out_reg = DFFE(BB1_q_a[4]_PORT_A_data_out, BB1_q_a[4]_clock_0, , , );
BB1_q_a[4] = BB1_q_a[4]_PORT_A_data_out_reg[0];

--BB1_q_a[6] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[6] at M4K_X19_Y9
BB1_q_a[4]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[4]_PORT_A_address_reg = DFFE(BB1_q_a[4]_PORT_A_address, BB1_q_a[4]_clock_0, , , );
BB1_q_a[4]_clock_0 = GLOBAL(R2_8);
BB1_q_a[4]_PORT_A_data_out = MEMORY(, , BB1_q_a[4]_PORT_A_address_reg, , , , , , BB1_q_a[4]_clock_0, , , , , );
BB1_q_a[4]_PORT_A_data_out_reg = DFFE(BB1_q_a[4]_PORT_A_data_out, BB1_q_a[4]_clock_0, , , );
BB1_q_a[6] = BB1_q_a[4]_PORT_A_data_out_reg[1];


--BB1_q_a[3] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[3] at M4K_X19_Y5
--RAM Block Operation Mode: ROM
--Port A Depth: 2048, Port A Width: 2
--Port A Logical Depth: 2048, Port A Logical Width: 10
--Port A Input: Registered, Port A Output: Registered
BB1_q_a[3]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[3]_PORT_A_address_reg = DFFE(BB1_q_a[3]_PORT_A_address, BB1_q_a[3]_clock_0, , , );
BB1_q_a[3]_clock_0 = GLOBAL(R2_8);
BB1_q_a[3]_PORT_A_data_out = MEMORY(, , BB1_q_a[3]_PORT_A_address_reg, , , , , , BB1_q_a[3]_clock_0, , , , , );
BB1_q_a[3]_PORT_A_data_out_reg = DFFE(BB1_q_a[3]_PORT_A_data_out, BB1_q_a[3]_clock_0, , , );
BB1_q_a[3] = BB1_q_a[3]_PORT_A_data_out_reg[0];

--BB1_q_a[5] is twowave_rom:inst14|altsyncram:altsyncram_component|altsyncram_o6q:auto_generated|q_a[5] at M4K_X19_Y5
BB1_q_a[3]_PORT_A_address = BUS(F1L1, F1L3, F1L4, F1L5, F1L6, F1L7, F1L8, F1L9, F1L01, F1L11, ke3);
BB1_q_a[3]_PORT_A_address_reg = DFFE(BB1_q_a[3]_PORT_A_address, BB1_q_a[3]_clock_0, , , );
BB1_q_a[3]_clock_0 = GLOBAL(R2_8);
BB1_q_a[3]_PORT_A_data_out = MEMORY(, , BB1_q_a[3]_PORT_A_address_reg, , , , , , BB1_q_a[3]_clock_0, , , , , );
BB1_q_a[3]_PORT_A_data_out_reg = DFFE(BB1_q_a[3]_PORT_A_data_out, BB1_q_a[3]_clock_0, , , );
BB1_q_a[5] = BB1_q_a[3]_PORT_A_data_out_reg[1];


--Q8L1 is qufanjiayi:inst19|7483:inst1|18~8 at LC_X17_Y8_N3
--operation mode is normal

Q8L1 = !BB1_q_a[4] & Q7L1 & !BB1_q_a[3];


--N1L8 is choosebq:inst16|inst35~33 at LC_X17_Y8_N5
--operation mode is normal

N1L8 = !BB1_q_a[6] & (!BB1_q_a[5] & Q8L1);


--N1L9 is choosebq:inst16|inst35~34 at LC_X17_Y8_N4
--operation mode is normal

N1L9 = Q3_45 & BB1_q_a[8] # !Q3_45 & (N1L8 & !BB1_q_a[7]);


--N1L7 is choosebq:inst16|inst31~99 at LC_X17_Y8_N6
--operation mode is normal

N1L7 = BB1_q_a[7] $ (!Q3_45 & !N1L8);


--N1L6 is choosebq:inst16|inst27~93 at LC_X17_Y8_N8
--operation mode is normal

N1L6 = BB1_q_a[6] $ (!Q3_45 & (BB1_q_a[5] # !Q8L1));


--N1L5 is choosebq:inst16|inst23~87 at LC_X17_Y8_N7
--operation mode is normal

N1L5 = BB1_q_a[5] $ (!Q3_45 & !Q8L1);


--N1L4 is choosebq:inst16|inst19~57 at LC_X17_Y8_N0
--operation mode is normal

N1L4 = BB1_q_a[4] $ (!Q3_45 & (BB1_q_a[3] # !Q7L1));


--N1L3 is choosebq:inst16|inst15~93 at LC_X17_Y8_N1
--operation mode is normal

N1L3 = BB1_q_a[3] $ (!Q7L1 & !Q3_45);


--N1L2 is choosebq:inst16|inst11~87 at LC_X17_Y7_N4
--operation mode is normal

N1L2 = BB1_q_a[2] $ (!Q3_45 & (BB1_q_a[0] # BB1_q_a[1]));


--N1L1 is choosebq:inst16|inst7~57 at LC_X17_Y7_N2
--operation mode is normal

N1L1 = BB1_q_a[1] $ (BB1_q_a[0] & !Q3_45);


--R7_8 is xianshi:inst10|74160:inst|8 at LC_X44_Y10_N5
--operation mode is normal

R7_8_lut_out = R7_8 $ (R7_6 & R7_7);
R7_8 = DFFEAS(R7_8_lut_out, GLOBAL(T2_87), VCC, , , , , , );


--R7_6 is xianshi:inst10|74160:inst|6 at LC_X44_Y10_N8
--operation mode is normal

R7_6_lut_out = !R7_6;
R7_6 = DFFEAS(R7_6_lut_out, GLOBAL(T2_87), VCC, , , , , , );


--R7_7 is xianshi:inst10|74160:inst|7 at LC_X44_Y10_N4
--operation mode is normal

R7_7_lut_out = R7_7 $ R7_6;
R7_7 = DFFEAS(R7_7_lut_out, GLOBAL(T2_87), VCC, , , , , , );


--Z1L1 is xianshi:inst10|74138:inst11|15~85 at LC_X44_Y12_N9
--operation mode is normal

Z1L1 = R7_8 & (R7_6 & R7_7);


--Z1L2 is xianshi:inst10|74138:inst11|15~86 at LC_X44_Y12_N8
--operation mode is normal

Z1L2 = R7_8 & (!R7_6 & R7_7);


--Z1L3 is xianshi:inst10|74138:inst11|15~87 at LC_X45_Y12_N8
--operation mode is normal

Z1L3 = !R7_7 & (R7_8 & R7_6);


--Z1L4 is xianshi:inst10|74138:inst11|15~88 at LC_X45_Y12_N4
--operation mode is normal

Z1L4 = !R7_7 & (R7_8 & !R7_6);


--Z1L5 is xianshi:inst10|74138:inst11|15~89 at LC_X47_Y12_N4
--operation mode is normal

Z1L5 = R7_6 & !R7_8 & R7_7;


--Z1L6 is xianshi:inst10|74138:inst11|15~90 at LC_X47_Y12_N6
--operation mode is normal

Z1L6 = !R7_6 & !R7_8 & R7_7;


--Z1L7 is xianshi:inst10|74138:inst11|15~91 at LC_X47_Y12_N5
--operation mode is normal

Z1L7 = R7_6 & !R7_8 & !R7_7;


--Z1L8 is xianshi:inst10|74138:inst11|15~92 at LC_X47_Y12_N2
--operation mode is normal

Z1L8 = !R7_6 & !R7_8 & !R7_7;


--W4_9 is cepin:inst11|74173:inst5|9 at LC_X45_Y11_N5
--operation mode is normal

W4_9_lut_out = R8_6;
W4_9 = DFFEAS(W4_9_lut_out, !GLOBAL(L1_inst), VCC, , , , , , );


--AB4L1 is xianshi:inst10|74151:inst7|f74151:sub|81~38 at LC_X45_Y11_N7
--operation mode is normal

W6_9_qfbk = W6_9;
AB4L1 = R7_6 & R7_7 # !R7_6 & (R7_7 & W6_9_qfbk # !R7_7 & (W4_9));

--W6_9 is cepin:inst11|74173:inst7|9 at LC_X45_Y11_N7
--operation mode is normal

W6_9 = DFFEAS(AB4L1, !GLOBAL(L1_inst), VCC, , , R01_6, , , VCC);


--W7_9 is cepin:inst11|74173:inst8|9 at LC_X45_Y11_N3
--operation mode is normal

W7_9_lut_out = R11_6;
W7_9 = DFFEAS(W7_9_lut_out, !GLOBAL(L1_inst), VCC, , , , , , );


--AB4L2 is xianshi:inst10|74151:inst7|f74151:sub|81~39 at LC_X45_Y11_N8
--operation mode is normal

W5_9_qfbk = W5_9;
AB4L2 = AB4L1 & (W7_9 # !R7_6) # !AB4L1 & R7_6 & W5_9_qfbk;

--W5_9 is cepin:inst11|74173:inst6|9 at LC_X45_Y11_N8
--operation mode is normal

W5_9 = DFFEAS(AB4L2, !GLOBAL(L1_inst), VCC, , , R9_6, , , VCC);


--R6_6 is kpzi:inst9|74160:inst8|6 at LC_X45_Y10_N4
--operation mode is normal

R6_6_lut_out = ke2 & !R6_6 # !ke2 & R6_6 & (!R5_6 # !R6_8);
R6_6 = DFFEAS(R6_6_lut_out, GLOBAL(T4_110), VCC, , , , , , );


--R4_6 is kpzi:inst9|74160:inst1|6 at LC_X40_Y12_N0
--operation mode is normal

R4_6_lut_out = R4L6 & (!R4_6) # !R4L6 & R4_6 & (!R3_6 # !R3_8);
R4_6 = DFFEAS(R4_6_lut_out, GLOBAL(T4_110), VCC, , , , , , );


--R3_6 is kpzi:inst9|74160:inst|6 at LC_X39_Y13_N7
--operation mode is normal