📄 dds.tan.qmsg

📁 直接数字频率合成
💻 QMSG
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{ "Info" "ITDB_TSU_RESULT" "cos_rom:inst5\|altsyncram:altsyncram_component\|altsyncram_mop:auto_generated\|ram_block1a2~porta_address_reg11 p3 cpz 6.714 ns memory " "Info: tsu for memory \"cos_rom:inst5\|altsyncram:altsyncram_component\|altsyncram_mop:auto_generated\|ram_block1a2~porta_address_reg11\" (data pin = \"p3\", clock pin = \"cpz\") is 6.714 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "14.361 ns + Longest pin memory " "Info: + Longest pin to memory delay is 14.361 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns p3 1 PIN PIN_86 1 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_86; Fanout = 1; PIN Node = 'p3'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { p3 } "NODE_NAME" } "" } } { "zong1.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/zong1.bdf" { { 496 72 240 512 "p3" "" } { 288 176 280 304 "p\[3..0\]" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.996 ns) + CELL(0.442 ns) 8.913 ns adderpp:inst\|7483:inst2\|45~100 2 COMB LC_X23_Y13_N4 1 " "Info: 2: + IC(6.996 ns) + CELL(0.442 ns) = 8.913 ns; Loc. = LC_X23_Y13_N4; Fanout = 1; COMB Node = 'adderpp:inst\|7483:inst2\|45~100'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.438 ns" { p3 adderpp:inst|7483:inst2|45~100 } "NODE_NAME" } "" } } { "7483.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7483.bdf" { { 328 696 760 368 "45" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.093 ns) + CELL(0.442 ns) 10.448 ns adderpp:inst\|7483:inst2\|45 3 COMB LC_X25_Y13_N0 10 " "Info: 3: + IC(1.093 ns) + CELL(0.442 ns) = 10.448 ns; Loc. = LC_X25_Y13_N0; Fanout = 10; COMB Node = 'adderpp:inst\|7483:inst2\|45'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "1.535 ns" { adderpp:inst|7483:inst2|45~100 adderpp:inst|7483:inst2|45 } "NODE_NAME" } "" } } { "7483.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7483.bdf" { { 328 696 760 368 "45" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.530 ns) + CELL(0.383 ns) 14.361 ns cos_rom:inst5\|altsyncram:altsyncram_component\|altsyncram_mop:auto_generated\|ram_block1a2~porta_address_reg11 4 MEM M4K_X19_Y9 1 " "Info: 4: + IC(3.530 ns) + CELL(0.383 ns) = 14.361 ns; Loc. = M4K_X19_Y9; Fanout = 1; MEM Node = 'cos_rom:inst5\|altsyncram:altsyncram_component\|altsyncram_mop:auto_generated\|ram_block1a2~porta_address_reg11'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "3.913 ns" { adderpp:inst|7483:inst2|45 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } "NODE_NAME" } "" } } { "db/altsyncram_mop.tdf" "" { Text "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/altsyncram_mop.tdf" 79 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.742 ns 19.09 % " "Info: Total cell delay = 2.742 ns ( 19.09 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.619 ns 80.91 % " "Info: Total interconnect delay = 11.619 ns ( 80.91 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "14.361 ns" { p3 adderpp:inst|7483:inst2|45~100 adderpp:inst|7483:inst2|45 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "14.361 ns" { p3 p3~out0 adderpp:inst|7483:inst2|45~100 adderpp:inst|7483:inst2|45 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } { 0.000ns 0.000ns 6.996ns 1.093ns 3.530ns } { 0.000ns 1.475ns 0.442ns 0.442ns 0.383ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns + " "Info: + Micro setup delay of destination is 0.093 ns" {  } { { "db/altsyncram_mop.tdf" "" { Text "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/altsyncram_mop.tdf" 79 2 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "cpz destination 7.740 ns - Shortest memory " "Info: - Shortest clock path from clock \"cpz\" to destination memory is 7.740 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns cpz 1 CLK PIN_28 8 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 8; CLK Node = 'cpz'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { cpz } "NODE_NAME" } "" } } { "zong1.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/zong1.bdf" { { 368 72 240 384 "cpz" "" } { 120 24 72 136 "cpz" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.030 ns) + CELL(0.935 ns) 3.434 ns mo48:inst1\|74160:inst4\|8 2 REG LC_X8_Y13_N7 277 " "Info: 2: + IC(1.030 ns) + CELL(0.935 ns) = 3.434 ns; Loc. = LC_X8_Y13_N7; Fanout = 277; REG Node = 'mo48:inst1\|74160:inst4\|8'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "1.965 ns" { cpz mo48:inst1|74160:inst4|8 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 544 1032 1096 624 "8" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.584 ns) + CELL(0.722 ns) 7.740 ns cos_rom:inst5\|altsyncram:altsyncram_component\|altsyncram_mop:auto_generated\|ram_block1a2~porta_address_reg11 3 MEM M4K_X19_Y9 1 " "Info: 3: + IC(3.584 ns) + CELL(0.722 ns) = 7.740 ns; Loc. = M4K_X19_Y9; Fanout = 1; MEM Node = 'cos_rom:inst5\|altsyncram:altsyncram_component\|altsyncram_mop:auto_generated\|ram_block1a2~porta_address_reg11'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "4.306 ns" { mo48:inst1|74160:inst4|8 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } "NODE_NAME" } "" } } { "db/altsyncram_mop.tdf" "" { Text "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/altsyncram_mop.tdf" 79 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.126 ns 40.39 % " "Info: Total cell delay = 3.126 ns ( 40.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.614 ns 59.61 % " "Info: Total interconnect delay = 4.614 ns ( 59.61 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.740 ns" { cpz mo48:inst1|74160:inst4|8 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.740 ns" { cpz cpz~out0 mo48:inst1|74160:inst4|8 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } { 0.000ns 0.000ns 1.030ns 3.584ns } { 0.000ns 1.469ns 0.935ns 0.722ns } } }  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "14.361 ns" { p3 adderpp:inst|7483:inst2|45~100 adderpp:inst|7483:inst2|45 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "14.361 ns" { p3 p3~out0 adderpp:inst|7483:inst2|45~100 adderpp:inst|7483:inst2|45 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } { 0.000ns 0.000ns 6.996ns 1.093ns 3.530ns } { 0.000ns 1.475ns 0.442ns 0.442ns 0.383ns } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.740 ns" { cpz mo48:inst1|74160:inst4|8 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.740 ns" { cpz cpz~out0 mo48:inst1|74160:inst4|8 cos_rom:inst5|altsyncram:altsyncram_component|altsyncram_mop:auto_generated|ram_block1a2~porta_address_reg11 } { 0.000ns 0.000ns 1.030ns 3.584ns } { 0.000ns 1.469ns 0.935ns 0.722ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "cpz sin\[1\] sin_rom:inst4\|altsyncram:altsyncram_component\|altsyncram_rop:auto_generated\|q_a\[1\] 16.059 ns memory " "Info: tco from clock \"cpz\" to destination pin \"sin\[1\]\" through memory \"sin_rom:inst4\|altsyncram:altsyncram_component\|altsyncram_rop:auto_generated\|q_a\[1\]\" is 16.059 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "cpz source 7.665 ns + Longest memory " "Info: + Longest clock path from clock \"cpz\" to source memory is 7.665 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns cpz 1 CLK PIN_28 8 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 8; CLK Node = 'cpz'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { cpz } "NODE_NAME" } "" } } { "zong1.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/zong1.bdf" { { 368 72 240 384 "cpz" "" } { 120 24 72 136 "cpz" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.030 ns) + CELL(0.935 ns) 3.434 ns mo48:inst1\|74160:inst4\|8 2 REG LC_X8_Y13_N7 277 " "Info: 2: + IC(1.030 ns) + CELL(0.935 ns) = 3.434 ns; Loc. = LC_X8_Y13_N7; Fanout = 277; REG Node = 'mo48:inst1\|74160:inst4\|8'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "1.965 ns" { cpz mo48:inst1|74160:inst4|8 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 544 1032 1096 624 "8" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.523 ns) + CELL(0.708 ns) 7.665 ns sin_rom:inst4\|altsyncram:altsyncram_component\|altsyncram_rop:auto_generated\|q_a\[1\] 3 MEM M4K_X33_Y12 1 " "Info: 3: + IC(3.523 ns) + CELL(0.708 ns) = 7.665 ns; Loc. = M4K_X33_Y12; Fanout = 1; MEM Node = 'sin_rom:inst4\|altsyncram:altsyncram_component\|altsyncram_rop:auto_generated\|q_a\[1\]'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "4.231 ns" { mo48:inst1|74160:inst4|8 sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "db/altsyncram_rop.tdf" "" { Text "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/altsyncram_rop.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.112 ns 40.60 % " "Info: Total cell delay = 3.112 ns ( 40.60 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.553 ns 59.40 % " "Info: Total interconnect delay = 4.553 ns ( 59.40 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.665 ns" { cpz mo48:inst1|74160:inst4|8 sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.665 ns" { cpz cpz~out0 mo48:inst1|74160:inst4|8 sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] } { 0.000ns 0.000ns 1.030ns 3.523ns } { 0.000ns 1.469ns 0.935ns 0.708ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.650 ns + " "Info: + Micro clock to output delay of source is 0.650 ns" {  } { { "db/altsyncram_rop.tdf" "" { Text "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/altsyncram_rop.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.744 ns + Longest memory pin " "Info: + Longest memory to pin delay is 7.744 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.104 ns) 0.104 ns sin_rom:inst4\|altsyncram:altsyncram_component\|altsyncram_rop:auto_generated\|q_a\[1\] 1 MEM M4K_X33_Y12 1 " "Info: 1: + IC(0.000 ns) + CELL(0.104 ns) = 0.104 ns; Loc. = M4K_X33_Y12; Fanout = 1; MEM Node = 'sin_rom:inst4\|altsyncram:altsyncram_component\|altsyncram_rop:auto_generated\|q_a\[1\]'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "db/altsyncram_rop.tdf" "" { Text "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/altsyncram_rop.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.516 ns) + CELL(2.124 ns) 7.744 ns sin\[1\] 2 PIN PIN_1 0 " "Info: 2: + IC(5.516 ns) + CELL(2.124 ns) = 7.744 ns; Loc. = PIN_1; Fanout = 0; PIN Node = 'sin\[1\]'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.640 ns" { sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] sin[1] } "NODE_NAME" } "" } } { "zong1.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/zong1.bdf" { { 408 576 752 424 "sin\[9..0\]" "" } { 144 720 768 160 "sin\[9..0\]" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.228 ns 28.77 % " "Info: Total cell delay = 2.228 ns ( 28.77 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.516 ns 71.23 % " "Info: Total interconnect delay = 5.516 ns ( 71.23 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.744 ns" { sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] sin[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.744 ns" { sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] sin[1] } { 0.000ns 5.516ns } { 0.104ns 2.124ns } } }  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.665 ns" { cpz mo48:inst1|74160:inst4|8 sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.665 ns" { cpz cpz~out0 mo48:inst1|74160:inst4|8 sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] } { 0.000ns 0.000ns 1.030ns 3.523ns } { 0.000ns 1.469ns 0.935ns 0.708ns } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.744 ns" { sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] sin[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.744 ns" { sin_rom:inst4|altsyncram:altsyncram_component|altsyncram_rop:auto_generated|q_a[1] sin[1] } { 0.000ns 5.516ns } { 0.104ns 2.124ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "leijiaqi:inst3\|74173:inst3\|8 k2 cpz 3.455 ns register " "Info: th for register \"leijiaqi:inst3\|74173:inst3\|8\" (data pin = \"k2\", clock pin = \"cpz\") is 3.455 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "cpz destination 7.764 ns + Longest register " "Info: + Longest clock path from clock \"cpz\" to destination register is 7.764 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns cpz 1 CLK PIN_28 8 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 8; CLK Node = 'cpz'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { cpz } "NODE_NAME" } "" } } { "zong1.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/zong1.bdf" { { 368 72 240 384 "cpz" "" } { 120 24 72 136 "cpz" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.030 ns) + CELL(0.935 ns) 3.434 ns mo48:inst1\|74160:inst4\|8 2 REG LC_X8_Y13_N7 277 " "Info: 2: + IC(1.030 ns) + CELL(0.935 ns) = 3.434 ns; Loc. = LC_X8_Y13_N7; Fanout = 277; REG Node = 'mo48:inst1\|74160:inst4\|8'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "1.965 ns" { cpz mo48:inst1|74160:inst4|8 } "NODE_NAME" } "" } } { "74160.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74160.bdf" { { 544 1032 1096 624 "8" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.619 ns) + CELL(0.711 ns) 7.764 ns leijiaqi:inst3\|74173:inst3\|8 3 REG LC_X24_Y13_N6 22 " "Info: 3: + IC(3.619 ns) + CELL(0.711 ns) = 7.764 ns; Loc. = LC_X24_Y13_N6; Fanout = 22; REG Node = 'leijiaqi:inst3\|74173:inst3\|8'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "4.330 ns" { mo48:inst1|74160:inst4|8 leijiaqi:inst3|74173:inst3|8 } "NODE_NAME" } "" } } { "74173.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74173.bdf" { { 312 592 656 392 "8" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns 40.12 % " "Info: Total cell delay = 3.115 ns ( 40.12 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.649 ns 59.88 % " "Info: Total interconnect delay = 4.649 ns ( 59.88 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.764 ns" { cpz mo48:inst1|74160:inst4|8 leijiaqi:inst3|74173:inst3|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.764 ns" { cpz cpz~out0 mo48:inst1|74160:inst4|8 leijiaqi:inst3|74173:inst3|8 } { 0.000ns 0.000ns 1.030ns 3.619ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.015 ns + " "Info: + Micro hold delay of destination is 0.015 ns" {  } { { "74173.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74173.bdf" { { 312 592 656 392 "8" "" } } } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.324 ns - Shortest pin register " "Info: - Shortest pin to register delay is 4.324 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns k2 1 PIN PIN_29 2 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 2; PIN Node = 'k2'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { k2 } "NODE_NAME" } "" } } { "zong1.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/zong1.bdf" { { 400 72 240 416 "k2" "" } { 136 232 272 152 "k2" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.248 ns) + CELL(0.607 ns) 4.324 ns leijiaqi:inst3\|74173:inst3\|8 2 REG LC_X24_Y13_N6 22 " "Info: 2: + IC(2.248 ns) + CELL(0.607 ns) = 4.324 ns; Loc. = LC_X24_Y13_N6; Fanout = 22; REG Node = 'leijiaqi:inst3\|74173:inst3\|8'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "2.855 ns" { k2 leijiaqi:inst3|74173:inst3|8 } "NODE_NAME" } "" } } { "74173.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74173.bdf" { { 312 592 656 392 "8" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.076 ns 48.01 % " "Info: Total cell delay = 2.076 ns ( 48.01 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.248 ns 51.99 % " "Info: Total interconnect delay = 2.248 ns ( 51.99 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "4.324 ns" { k2 leijiaqi:inst3|74173:inst3|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "4.324 ns" { k2 k2~out0 leijiaqi:inst3|74173:inst3|8 } { 0.000ns 0.000ns 2.248ns } { 0.000ns 1.469ns 0.607ns } } }  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "7.764 ns" { cpz mo48:inst1|74160:inst4|8 leijiaqi:inst3|74173:inst3|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.764 ns" { cpz cpz~out0 mo48:inst1|74160:inst4|8 leijiaqi:inst3|74173:inst3|8 } { 0.000ns 0.000ns 1.030ns 3.619ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "4.324 ns" { k2 leijiaqi:inst3|74173:inst3|8 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "4.324 ns" { k2 k2~out0 leijiaqi:inst3|74173:inst3|8 } { 0.000ns 0.000ns 2.248ns } { 0.000ns 1.469ns 0.607ns } } }  } 0}
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