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📄 mux_8cb.tdf

📁 直接数字频率合成
💻 TDF
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--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" LPM_SIZE=2 LPM_WIDTH=10 LPM_WIDTHS=1 data result sel
--VERSION_BEGIN 5.0 cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:04:13:17:26:48:SJ  VERSION_END


--  Copyright (C) 1988-2005 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.



--synthesis_resources = lut 10 
SUBDESIGN mux_8cb
( 
	data[19..0]	:	input;
	result[9..0]	:	output;
	sel[0..0]	:	input;
) 
VARIABLE 
	result_node[9..0]	: WIRE;
	sel_node[0..0]	: WIRE;
	w_data109w[1..0]	: WIRE;
	w_data121w[1..0]	: WIRE;
	w_data133w[1..0]	: WIRE;
	w_data145w[1..0]	: WIRE;
	w_data157w[1..0]	: WIRE;
	w_data169w[1..0]	: WIRE;
	w_data181w[1..0]	: WIRE;
	w_data193w[1..0]	: WIRE;
	w_data205w[1..0]	: WIRE;
	w_data95w[1..0]	: WIRE;
	w_result102w	: WIRE;
	w_result110w	: WIRE;
	w_result116w	: WIRE;
	w_result122w	: WIRE;
	w_result128w	: WIRE;
	w_result134w	: WIRE;
	w_result140w	: WIRE;
	w_result146w	: WIRE;
	w_result152w	: WIRE;
	w_result158w	: WIRE;
	w_result164w	: WIRE;
	w_result170w	: WIRE;
	w_result176w	: WIRE;
	w_result182w	: WIRE;
	w_result188w	: WIRE;
	w_result194w	: WIRE;
	w_result200w	: WIRE;
	w_result206w	: WIRE;
	w_result212w	: WIRE;
	w_result96w	: WIRE;

BEGIN 
	result[] = result_node[];
	result_node[] = ( w_result206w, w_result194w, w_result182w, w_result170w, w_result158w, w_result146w, w_result134w, w_result122w, w_result110w, w_result96w);
	sel_node[] = ( sel[0..0]);
	w_data109w[] = ( data[11..11], data[1..1]);
	w_data121w[] = ( data[12..12], data[2..2]);
	w_data133w[] = ( data[13..13], data[3..3]);
	w_data145w[] = ( data[14..14], data[4..4]);
	w_data157w[] = ( data[15..15], data[5..5]);
	w_data169w[] = ( data[16..16], data[6..6]);
	w_data181w[] = ( data[17..17], data[7..7]);
	w_data193w[] = ( data[18..18], data[8..8]);
	w_data205w[] = ( data[19..19], data[9..9]);
	w_data95w[] = ( data[10..10], data[0..0]);
	w_result102w = ((sel_node[] & w_data95w[1..1]) # ((! sel_node[]) & w_data95w[0..0]));
	w_result110w = w_result116w;
	w_result116w = ((sel_node[] & w_data109w[1..1]) # ((! sel_node[]) & w_data109w[0..0]));
	w_result122w = w_result128w;
	w_result128w = ((sel_node[] & w_data121w[1..1]) # ((! sel_node[]) & w_data121w[0..0]));
	w_result134w = w_result140w;
	w_result140w = ((sel_node[] & w_data133w[1..1]) # ((! sel_node[]) & w_data133w[0..0]));
	w_result146w = w_result152w;
	w_result152w = ((sel_node[] & w_data145w[1..1]) # ((! sel_node[]) & w_data145w[0..0]));
	w_result158w = w_result164w;
	w_result164w = ((sel_node[] & w_data157w[1..1]) # ((! sel_node[]) & w_data157w[0..0]));
	w_result170w = w_result176w;
	w_result176w = ((sel_node[] & w_data169w[1..1]) # ((! sel_node[]) & w_data169w[0..0]));
	w_result182w = w_result188w;
	w_result188w = ((sel_node[] & w_data181w[1..1]) # ((! sel_node[]) & w_data181w[0..0]));
	w_result194w = w_result200w;
	w_result200w = ((sel_node[] & w_data193w[1..1]) # ((! sel_node[]) & w_data193w[0..0]));
	w_result206w = w_result212w;
	w_result212w = ((sel_node[] & w_data205w[1..1]) # ((! sel_node[]) & w_data205w[0..0]));
	w_result96w = w_result102w;
END;
--VALID FILE

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