dds.fit.qmsg

直接数字频率合成

{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "5.554 ns register register " "Info: Estimated most critical path is register to register delay of 5.554 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns leijiaqi:inst3\|74173:inst3\|9 1 REG LAB_X24_Y13 23 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X24_Y13; Fanout = 23; REG Node = 'leijiaqi:inst3\|74173:inst3\|9'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { leijiaqi:inst3|74173:inst3|9 } "NODE_NAME" } "" } } { "74173.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74173.bdf" { { 152 592 656 232 "9" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.150 ns) + CELL(0.590 ns) 0.740 ns leijiaqi:inst3\|7483:inst\|1~199 2 COMB LAB_X24_Y13 2 " "Info: 2: + IC(0.150 ns) + CELL(0.590 ns) = 0.740 ns; Loc. = LAB_X24_Y13; Fanout = 2; COMB Node = 'leijiaqi:inst3\|7483:inst\|1~199'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "0.740 ns" { leijiaqi:inst3|74173:inst3|9 leijiaqi:inst3|7483:inst|1~199 } "NODE_NAME" } "" } } { "7483.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7483.bdf" { { 400 616 680 472 "1" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.298 ns) + CELL(0.590 ns) 1.628 ns leijiaqi:inst3\|7483:inst\|1~200 3 COMB LAB_X25_Y13 3 " "Info: 3: + IC(0.298 ns) + CELL(0.590 ns) = 1.628 ns; Loc. = LAB_X25_Y13; Fanout = 3; COMB Node = 'leijiaqi:inst3\|7483:inst\|1~200'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "0.888 ns" { leijiaqi:inst3|7483:inst|1~199 leijiaqi:inst3|7483:inst|1~200 } "NODE_NAME" } "" } } { "7483.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7483.bdf" { { 400 616 680 472 "1" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.550 ns) + CELL(0.114 ns) 2.292 ns leijiaqi:inst3\|7483:inst1\|18~1 4 COMB LAB_X25_Y13 4 " "Info: 4: + IC(0.550 ns) + CELL(0.114 ns) = 2.292 ns; Loc. = LAB_X25_Y13; Fanout = 4; COMB Node = 'leijiaqi:inst3\|7483:inst1\|18~1'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "0.664 ns" { leijiaqi:inst3|7483:inst|1~200 leijiaqi:inst3|7483:inst1|18~1 } "NODE_NAME" } "" } } { "7483.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7483.bdf" { { 848 616 680 888 "18" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.550 ns) + CELL(0.114 ns) 2.956 ns leijiaqi:inst3\|7483:inst1\|2 5 COMB LAB_X25_Y13 4 " "Info: 5: + IC(0.550 ns) + CELL(0.114 ns) = 2.956 ns; Loc. = LAB_X25_Y13; Fanout = 4; COMB Node = 'leijiaqi:inst3\|7483:inst1\|2'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "0.664 ns" { leijiaqi:inst3|7483:inst1|18~1 leijiaqi:inst3|7483:inst1|2 } "NODE_NAME" } "" } } { "7483.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7483.bdf" { { 56 616 680 160 "2" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.181 ns) + CELL(0.114 ns) 4.251 ns leijiaqi:inst3\|7483:inst2\|1~1 6 COMB LAB_X23_Y13 1 " "Info: 6: + IC(1.181 ns) + CELL(0.114 ns) = 4.251 ns; Loc. = LAB_X23_Y13; Fanout = 1; COMB Node = 'leijiaqi:inst3\|7483:inst2\|1~1'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "1.295 ns" { leijiaqi:inst3|7483:inst1|2 leijiaqi:inst3|7483:inst2|1~1 } "NODE_NAME" } "" } } { "7483.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/7483.bdf" { { 400 616 680 472 "1" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.436 ns) + CELL(0.867 ns) 5.554 ns leijiaqi:inst3\|74173:inst5\|7 7 REG LAB_X23_Y13 14 " "Info: 7: + IC(0.436 ns) + CELL(0.867 ns) = 5.554 ns; Loc. = LAB_X23_Y13; Fanout = 14; REG Node = 'leijiaqi:inst3\|74173:inst5\|7'" {  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "1.303 ns" { leijiaqi:inst3|7483:inst2|1~1 leijiaqi:inst3|74173:inst5|7 } "NODE_NAME" } "" } } { "74173.bdf" "" { Schematic "c:/altera/quartus50/libraries/others/maxplus2/74173.bdf" { { 472 592 656 552 "7" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.389 ns 43.01 % " "Info: Total cell delay = 2.389 ns ( 43.01 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.165 ns 56.99 % " "Info: Total interconnect delay = 3.165 ns ( 56.99 % )" {  } {  } 0}  } { { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "5.554 ns" { leijiaqi:inst3|74173:inst3|9 leijiaqi:inst3|7483:inst|1~199 leijiaqi:inst3|7483:inst|1~200 leijiaqi:inst3|7483:inst1|18~1 leijiaqi:inst3|7483:inst1|2 leijiaqi:inst3|7483:inst2|1~1 leijiaqi:inst3|74173:inst5|7 } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 2 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 2%." {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Info: Design uses memory blocks. Violating setup or hold times of memory block address registers could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements" {  } {  } 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "2 " "Warning: The following 2 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "mode1 GND " "Info: Pin mode1 has GND driving its datain port" {  } { { "zong1.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/zong1.bdf" { { 432 576 752 448 "mode1" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "mode1" } } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { mode1 } "NODE_NAME" } "" } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/dds.fld" "" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/dds.fld" "" "" { mode1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "mode2 GND " "Info: Pin mode2 has GND driving its datain port" {  } { { "zong1.bdf" "" { Schematic "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/zong1.bdf" { { 456 576 752 472 "mode2" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "mode2" } } } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/" "" "" { mode2 } "NODE_NAME" } "" } } { "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/dds.fld" "" { Floorplan "C:/Documents and Settings/Administrator.CF141A501F304D5/桌面/实验材料/EDAandDDS/ddsdds2/dds.fld" "" "" { mode2 } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 21 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 21 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Apr 01 11:00:02 2006 " "Info: Processing ended: Sat Apr 01 11:00:02 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0}  } {  } 0}