prev_cmp_vga.qmsg

vga显示时序控制

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Mar 19 21:14:49 2009 " "Info: Processing started: Thu Mar 19 21:14:49 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off VGA -c VGA --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off VGA -c VGA --generate_functional_sim_netlist" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "VGA.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file VGA.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 VGA-WX " "Info: Found design unit 1: VGA-WX" {  } { { "VGA.vhd" "" { Text "D:/fpga.vhdl.scnu/VGA/VGA.vhd" 11 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 VGA " "Info: Found entity 1: VGA" {  } { { "VGA.vhd" "" { Text "D:/fpga.vhdl.scnu/VGA/VGA.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "VGA " "Info: Elaborating entity \"VGA\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "GRBX VGA.vhd(35) " "Warning (10492): VHDL Process Statement warning at VGA.vhd(35): signal \"GRBX\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "VGA.vhd" "" { Text "D:/fpga.vhdl.scnu/VGA/VGA.vhd" 35 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "GRBY VGA.vhd(36) " "Warning (10492): VHDL Process Statement warning at VGA.vhd(36): signal \"GRBY\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "VGA.vhd" "" { Text "D:/fpga.vhdl.scnu/VGA/VGA.vhd" 36 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "GRBX VGA.vhd(37) " "Warning (10492): VHDL Process Statement warning at VGA.vhd(37): signal \"GRBX\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "VGA.vhd" "" { Text "D:/fpga.vhdl.scnu/VGA/VGA.vhd" 37 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "GRBY VGA.vhd(37) " "Warning (10492): VHDL Process Statement warning at VGA.vhd(37): signal \"GRBY\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "VGA.vhd" "" { Text "D:/fpga.vhdl.scnu/VGA/VGA.vhd" 37 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Functional Simulation Netlist Generation 0 s 4 s Quartus II " "Info: Quartus II Functional Simulation Netlist Generation was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "170 " "Info: Peak virtual memory: 170 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 19 21:14:53 2009 " "Info: Processing ended: Thu Mar 19 21:14:53 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}