bcd.fit.eqn

FPGA开发板配套Verilog HDL代码。芯片为Mars EP1C6F。是基础实验的源码。包括加法器、减法器、乘法器、多路选择器等。

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-- applicable agreement for further details.
--A1L100Q is en[0]~reg0 at LC_X23_Y11_N6
--operation mode is normal

A1L100Q_lut_out = !A1L100Q;
A1L100Q = DFFEAS(A1L100Q_lut_out, GLOBAL(clk), GLOBAL(rst), , A1L111, , , , );


--A1L102Q is en[1]~reg0 at LC_X23_Y11_N1
--operation mode is normal

A1L102Q_lut_out = !A1L102Q;
A1L102Q = DFFEAS(A1L102Q_lut_out, GLOBAL(clk), GLOBAL(rst), , A1L111, , , , );


--A1L70 is c_tmp[0]~212 at LC_X19_Y20_N2
--operation mode is normal

A1L70 = A1L102Q & A1L100Q & (a[2] # a[1]);


--A1L74 is c_tmp[3]~213 at LC_X19_Y20_N5
--operation mode is normal

A1L74 = !A1L102Q & (!A1L100Q);


--A1L71 is c_tmp[0]~214 at LC_X19_Y20_N4
--operation mode is normal

A1L71 = A1L70 & (a[3] # a[0] & A1L74) # !A1L70 & a[0] & (A1L74);


--A1L72 is c_tmp[1]~215 at LC_X20_Y20_N6
--operation mode is normal

A1L72 = A1L74 & (a[3] & a[2] & !a[1] # !a[3] & (a[1]));


--A1L73 is c_tmp[2]~216 at LC_X20_Y20_N3
--operation mode is normal

A1L73 = a[2] & A1L74 & (a[1] # !a[3]);


--A1L75 is c_tmp[3]~217 at LC_X20_Y20_N9
--operation mode is normal

A1L75 = !a[2] & a[3] & A1L74 & !a[1];


--A1L103 is reduce_or~130 at LC_X20_Y20_N2
--operation mode is normal

A1L103 = A1L71 & (A1L75 # A1L72 $ A1L73) # !A1L71 & (A1L72 # A1L73 $ A1L75);


--A1L104 is reduce_or~131 at LC_X20_Y20_N8
--operation mode is normal

A1L104 = A1L72 & !A1L75 & (A1L71 # !A1L73) # !A1L72 & A1L71 & (A1L73 $ !A1L75);


--A1L105 is reduce_or~132 at LC_X20_Y20_N7
--operation mode is normal

A1L105 = A1L72 & (!A1L75 & A1L71) # !A1L72 & (A1L73 & !A1L75 # !A1L73 & (A1L71));


--A1L106 is reduce_or~133 at LC_X20_Y20_N1
--operation mode is normal

A1L106 = A1L71 & (A1L72 $ !A1L73) # !A1L71 & (A1L72 & !A1L73 & A1L75 # !A1L72 & A1L73 & !A1L75);


--A1L107 is reduce_or~134 at LC_X20_Y20_N4
--operation mode is normal

A1L107 = A1L73 & A1L75 & (A1L72 # !A1L71) # !A1L73 & A1L72 & !A1L75 & !A1L71;


--A1L108 is reduce_or~135 at LC_X20_Y20_N5
--operation mode is normal

A1L108 = A1L72 & (A1L71 & (A1L75) # !A1L71 & A1L73) # !A1L72 & A1L73 & (A1L75 $ A1L71);


--A1L109 is reduce_or~136 at LC_X20_Y20_N0
--operation mode is normal

A1L109 = A1L73 & !A1L72 & (A1L75 $ !A1L71) # !A1L73 & A1L71 & (A1L72 $ !A1L75);


--cnt[18] is cnt[18] at LC_X23_Y11_N5
--operation mode is normal

cnt[18]_lut_out = !A1L111 & A1L6;
cnt[18] = DFFEAS(cnt[18]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L112 is rtl~150 at LC_X23_Y11_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[19]_qfbk = cnt[19];
A1L112 = !cnt[19]_qfbk & cnt[18];

--cnt[19] is cnt[19] at LC_X23_Y11_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[19] = DFFEAS(A1L112, GLOBAL(clk), GLOBAL(rst), , , A1L9, , , VCC);


--cnt[14] is cnt[14] at LC_X23_Y11_N2
--operation mode is normal

cnt[14]_lut_out = A1L16;
cnt[14] = DFFEAS(cnt[14]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--cnt[13] is cnt[13] at LC_X23_Y11_N4
--operation mode is normal

cnt[13]_lut_out = A1L18;
cnt[13] = DFFEAS(cnt[13]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--cnt[12] is cnt[12] at LC_X23_Y11_N8
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[12]_lut_out = GND;
cnt[12] = DFFEAS(cnt[12]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L21, , , VCC);


--A1L113 is rtl~151 at LC_X23_Y11_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[15]_qfbk = cnt[15];
A1L113 = cnt[14] & cnt[13] & cnt[15]_qfbk & cnt[12];

--cnt[15] is cnt[15] at LC_X23_Y11_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[15] = DFFEAS(A1L113, GLOBAL(clk), GLOBAL(rst), , , A1L13, , , VCC);


--cnt[17] is cnt[17] at LC_X25_Y11_N2
--operation mode is normal

cnt[17]_lut_out = !A1L111 & A1L24;
cnt[17] = DFFEAS(cnt[17]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L114 is rtl~152 at LC_X23_Y11_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[16]_qfbk = cnt[16];
A1L114 = !cnt[17] & A1L112 & cnt[16]_qfbk & A1L113;

--cnt[16] is cnt[16] at LC_X23_Y11_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[16] = DFFEAS(A1L114, GLOBAL(clk), GLOBAL(rst), , , A1L10, , , VCC);


--cnt[10] is cnt[10] at LC_X25_Y12_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[10]_lut_out = GND;
cnt[10] = DFFEAS(cnt[10]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L30, , , VCC);


--cnt[9] is cnt[9] at LC_X25_Y12_N5
--operation mode is normal

cnt[9]_lut_out = A1L33;
cnt[9] = DFFEAS(cnt[9]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--cnt[8] is cnt[8] at LC_X25_Y12_N7
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[8]_lut_out = GND;
cnt[8] = DFFEAS(cnt[8]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L35, , , VCC);


--A1L115 is rtl~153 at LC_X25_Y12_N8
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[11]_qfbk = cnt[11];
A1L115 = cnt[8] & cnt[9] & cnt[11]_qfbk & cnt[10];

--cnt[11] is cnt[11] at LC_X25_Y12_N8
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[11] = DFFEAS(A1L115, GLOBAL(clk), GLOBAL(rst), , , A1L27, , , VCC);


--cnt[6] is cnt[6] at LC_X23_Y12_N6
--operation mode is normal

cnt[6]_lut_out = A1L41;
cnt[6] = DFFEAS(cnt[6]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--cnt[5] is cnt[5] at LC_X23_Y12_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[5]_lut_out = GND;
cnt[5] = DFFEAS(cnt[5]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L44, , , VCC);


--cnt[4] is cnt[4] at LC_X23_Y12_N0
--operation mode is normal

cnt[4]_lut_out = A1L47;
cnt[4] = DFFEAS(cnt[4]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L116 is rtl~154 at LC_X23_Y12_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[7]_qfbk = cnt[7];
A1L116 = cnt[5] & cnt[4] & cnt[7]_qfbk & cnt[6];

--cnt[7] is cnt[7] at LC_X23_Y12_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[7] = DFFEAS(A1L116, GLOBAL(clk), GLOBAL(rst), , , A1L38, , , VCC);


--cnt[2] is cnt[2] at LC_X25_Y12_N6
--operation mode is normal

cnt[2]_lut_out = A1L52;
cnt[2] = DFFEAS(cnt[2]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--cnt[1] is cnt[1] at LC_X25_Y12_N4
--operation mode is normal

cnt[1]_lut_out = A1L55;
cnt[1] = DFFEAS(cnt[1]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--cnt[0] is cnt[0] at LC_X25_Y12_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[0]_lut_out = GND;
cnt[0] = DFFEAS(cnt[0]_lut_out, GLOBAL(clk), GLOBAL(rst), , , A1L58, , , VCC);


--A1L117 is rtl~155 at LC_X25_Y12_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[3]_qfbk = cnt[3];
A1L117 = cnt[0] & cnt[1] & cnt[3]_qfbk & cnt[2];

--cnt[3] is cnt[3] at LC_X25_Y12_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

cnt[3] = DFFEAS(A1L117, GLOBAL(clk), GLOBAL(rst), , , A1L49, , , VCC);


--A1L111 is rtl~0 at LC_X23_Y11_N7
--operation mode is normal

A1L111 = A1L114 & A1L116 & A1L117 & A1L115;


--A1L6 is add~301 at LC_X24_Y11_N8
--operation mode is arithmetic

A1L6_carry_eqn = (!A1L17 & A1L25) # (A1L17 & A1L26);
A1L6 = cnt[18] $ !A1L6_carry_eqn;

--A1L7 is add~303 at LC_X24_Y11_N8
--operation mode is arithmetic

A1L7_cout_0 = cnt[18] & !A1L25;
A1L7 = CARRY(A1L7_cout_0);

--A1L8 is add~303COUT1_449 at LC_X24_Y11_N8
--operation mode is arithmetic

A1L8_cout_1 = cnt[18] & !A1L26;
A1L8 = CARRY(A1L8_cout_1);


--A1L9 is add~306 at LC_X24_Y11_N9
--operation mode is normal

A1L9_carry_eqn = (!A1L17 & A1L7) # (A1L17 & A1L8);
A1L9 = cnt[19] $ A1L9_carry_eqn;


--A1L10 is add~311 at LC_X24_Y11_N6
--operation mode is arithmetic

A1L10_carry_eqn = (!A1L17 & A1L14) # (A1L17 & A1L15);
A1L10 = cnt[16] $ !A1L10_carry_eqn;

--A1L11 is add~313 at LC_X24_Y11_N6
--operation mode is arithmetic

A1L11_cout_0 = cnt[16] & !A1L14;
A1L11 = CARRY(A1L11_cout_0);

--A1L12 is add~313COUT1_445 at LC_X24_Y11_N6
--operation mode is arithmetic

A1L12_cout_1 = cnt[16] & !A1L15;
A1L12 = CARRY(A1L12_cout_1);


--A1L13 is add~316 at LC_X24_Y11_N5
--operation mode is arithmetic

A1L13_carry_eqn = A1L17;
A1L13 = cnt[15] $ (A1L13_carry_eqn);

--A1L14 is add~318 at LC_X24_Y11_N5
--operation mode is arithmetic

A1L14_cout_0 = !A1L17 # !cnt[15];
A1L14 = CARRY(A1L14_cout_0);

--A1L15 is add~318COUT1_443 at LC_X24_Y11_N5
--operation mode is arithmetic

A1L15_cout_1 = !A1L17 # !cnt[15];
A1L15 = CARRY(A1L15_cout_1);


--A1L16 is add~321 at LC_X24_Y11_N4
--operation mode is arithmetic

A1L16_carry_eqn = (!A1L34 & A1L19) # (A1L34 & A1L20);
A1L16 = cnt[14] $ !A1L16_carry_eqn;

--A1L17 is add~323 at LC_X24_Y11_N4
--operation mode is arithmetic

A1L17 = CARRY(cnt[14] & !A1L20);


--A1L18 is add~326 at LC_X24_Y11_N3
--operation mode is arithmetic