ps2tolcd.map.qmsg

FPGA开发板配套Verilog代码。芯片为Mars EP1C6F。一些接口通信的源码。包括7段数码管、I2C通讯等。

{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd:inst2\|lcd_rw data_in GND " "Warning: Reduced register \"lcd:inst2\|lcd_rw\" with stuck data_in port to stuck value GND" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 4 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state 15 " "Info: State machine \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state\" contains 15 states" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|ps2tolcd\|lcd:inst2\|state 10 " "Info: State machine \"\|ps2tolcd\|lcd:inst2\|state\" contains 10 states" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state " "Info: Selected Auto state machine encoding method for state machine \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state " "Info: Encoding result for state machine \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "15 " "Info: Completed encoding using 15 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_error_no_keyboard_ack " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_error_no_keyboard_ack\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_rx_falling_edge_marker " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_rx_falling_edge_marker\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_rx_rising_edge_marker " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_rx_rising_edge_marker\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_rx_clk_l " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_rx_clk_l\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_reset_timer " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_reset_timer\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_force_clk_l " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_force_clk_l\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_h " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_h\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_l " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_l\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_wait_clk_h " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_wait_clk_h\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_rising_edge_marker " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_rising_edge_marker\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_clk_h " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_clk_h\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_clk_l " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_clk_l\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_wait_keyboard_ack " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_wait_keyboard_ack\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_done_recovery " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_done_recovery\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "ps2_keyboard_interface:inst3\|m1_state.m1_rx_clk_h " "Info: Encoded state bit \"ps2_keyboard_interface:inst3\|m1_state.m1_rx_clk_h\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_rx_clk_h 000000000000000 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_rx_clk_h\" uses code string \"000000000000000\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_done_recovery 000000000000011 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_done_recovery\" uses code string \"000000000000011\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_wait_keyboard_ack 000000000000101 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_wait_keyboard_ack\" uses code string \"000000000000101\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_clk_l 000000000001001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_clk_l\" uses code string \"000000000001001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_clk_h 000000000010001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_clk_h\" uses code string \"000000000010001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_rising_edge_marker 000000000100001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_rising_edge_marker\" uses code string \"000000000100001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_wait_clk_h 000000001000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_wait_clk_h\" uses code string \"000000001000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_l 000000010000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_l\" uses code string \"000000010000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_h 000000100000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_h\" uses code string \"000000100000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_force_clk_l 000001000000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_force_clk_l\" uses code string \"000001000000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_reset_timer 000010000000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_reset_timer\" uses code string \"000010000000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_rx_clk_l 000100000000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_rx_clk_l\" uses code string \"000100000000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_rx_rising_edge_marker 001000000000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_rx_rising_edge_marker\" uses code string \"001000000000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_rx_falling_edge_marker 010000000000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_rx_falling_edge_marker\" uses code string \"010000000000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_error_no_keyboard_ack 100000000000001 " "Info: State \"\|ps2tolcd\|ps2_keyboard_interface:inst3\|m1_state.m1_tx_error_no_keyboard_ack\" uses code string \"100000000000001\"" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|ps2tolcd\|lcd:inst2\|state " "Info: Selected Auto state machine encoding method for state machine \"\|ps2tolcd\|lcd:inst2\|state\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|ps2tolcd\|lcd:inst2\|state " "Info: Encoding result for state machine \"\|ps2tolcd\|lcd:inst2\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "10 " "Info: Completed encoding using 10 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.IDLE " "Info: Encoded state bit \"lcd:inst2\|state.IDLE\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.WRITERAM " "Info: Encoded state bit \"lcd:inst2\|state.WRITERAM\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.SETDDRAM " "Info: Encoded state bit \"lcd:inst2\|state.SETDDRAM\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.SETCGRAM " "Info: Encoded state bit \"lcd:inst2\|state.SETCGRAM\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.SETFUNCTION " "Info: Encoded state bit \"lcd:inst2\|state.SETFUNCTION\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.SHIFT " "Info: Encoded state bit \"lcd:inst2\|state.SHIFT\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.SWITCHMODE " "Info: Encoded state bit \"lcd:inst2\|state.SWITCHMODE\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.SETMODE " "Info: Encoded state bit \"lcd:inst2\|state.SETMODE\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.RETURNCURSOR " "Info: Encoded state bit \"lcd:inst2\|state.RETURNCURSOR\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst2\|state.CLEAR " "Info: Encoded state bit \"lcd:inst2\|state.CLEAR\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.IDLE 0000000000 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.IDLE\" uses code string \"0000000000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.SWITCHMODE 1000001000 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.SWITCHMODE\" uses code string \"1000001000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.RETURNCURSOR 1000000010 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.RETURNCURSOR\" uses code string \"1000000010\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.WRITERAM 1100000000 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.WRITERAM\" uses code string \"1100000000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.SETDDRAM 1010000000 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.SETDDRAM\" uses code string \"1010000000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.CLEAR 1000000001 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.CLEAR\" uses code string \"1000000001\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.SETMODE 1000000100 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.SETMODE\" uses code string \"1000000100\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.SHIFT 1000010000 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.SHIFT\" uses code string \"1000010000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.SETFUNCTION 1000100000 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.SETFUNCTION\" uses code string \"1000100000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|ps2tolcd\|lcd:inst2\|state.SETCGRAM 1001000000 " "Info: State \"\|ps2tolcd\|lcd:inst2\|state.SETCGRAM\" uses code string \"1001000000\"" {  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 9 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_force_clk_l data_in GND " "Warning: Reduced register \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_force_clk_l\" with stuck data_in port to stuck value GND" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_h data_in GND " "Warning: Reduced register \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_h\" with stuck data_in port to stuck value GND" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_l data_in GND " "Warning: Reduced register \"ps2_keyboard_interface:inst3\|m1_state.m1_tx_first_wait_clk_l\" with stuck data_in port to stuck value GND" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 229 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "lcd_rw GND " "Warning: Pin \"lcd_rw\" stuck at GND" {  } { { "ps2tolcd.bdf" "" { Schematic "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/PROJ/ps2tolcd.bdf" { { 560 856 1032 576 "lcd_rw" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "led\[7\] GND " "Warning: Pin \"led\[7\]\" stuck at GND" {  } { { "ps2tolcd.bdf" "" { Schematic "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/PROJ/ps2tolcd.bdf" { { 360 624 800 376 "led\[7..0\]" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "425 " "Info: Implemented 425 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "19 " "Info: Implemented 19 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_BIDIRS" "2 " "Info: Implemented 2 bidirectional pins" {  } {  } 0 0 "Implemented %1!d! bidirectional pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "402 " "Info: Implemented 402 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 42 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 42 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Oct 21 15:39:53 2006 " "Info: Processing ended: Sat Oct 21 15:39:53 2006" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:08 " "Info: Elapsed time: 00:00:08" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}