📄 ps2tolcd.tan.qmsg
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{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "lcd:inst2\|data_in_buf\[0\] " "Info: Node \"lcd:inst2\|data_in_buf\[0\]\"" { } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 94 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 94 -1 0 } } } 0 0 "Found combinational loop of %1!d! nodes" 0 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "lcd:inst2\|data_in_buf\[1\] " "Info: Node \"lcd:inst2\|data_in_buf\[1\]\"" { } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 94 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 94 -1 0 } } } 0 0 "Found combinational loop of %1!d! nodes" 0 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "lcd:inst2\|data_in_buf\[2\] " "Info: Node \"lcd:inst2\|data_in_buf\[2\]\"" { } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 94 -1 0 } } } 0 0 "Node \"%1!s!\"" 0 0} } { { "../SRC/lcd.v" "" { Text "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 94 -1 0 } } } 0 0 "Found combinational loop of %1!d! nodes" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "mclk " "Info: Assuming node \"mclk\" is an undefined clock" { } { { "ps2tolcd.bdf" "" { Schematic "E:/扬创开发板/Mars-EDA-P/EP1C12/示例程序/veriloge/接口实验/PS2/PROJ/ps2tolcd.bdf" { { 208 -176 -8 224 "mclk" "" } } } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "mclk" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} } { } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
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