lcd.gyd

FPGA开发板配套VHDL代码。芯片为Mars EP1C6F。一些接口通信的源码。包括7段数码管、I2C通讯等。

Pin Freeze File:  version G.28

95144XL144TQ XC95144XL-10-TQ144
Reset S:PIN110
clk S:PIN128
data<1> S:PIN70
data<4> S:PIN64
data<5> S:PIN66
data<6> S:PIN61
data<2> S:PIN71
data<0> S:PIN75
data<3> S:PIN69
data<7> S:PIN58
lcd_rs S:PIN57
lcd_rw S:PIN56


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_1 clkdiv<9> clkdiv<8> clkdiv<7> clkdiv<24>
		 clkdiv<23> clkdiv<22> clkdiv<21> clkdiv<20>
		 clkdiv<19> clkdiv<18> clkdiv<17> clkdiv<16>
		 clkdiv<15> clkdiv<14> clkdiv<13> clkdiv<12>
		 clkdiv<11> clkdiv<10>
PARTITION FB2_1 data<5>_BUFR.MC EXP15_
PARTITION FB2_8 clkdiv<0> flag clkdiv<4> clkdiv<3>
		 clkdiv<2> clkdiv<1> state_FFT3 div_counter<3>
		 div_counter<2> div_counter<1> EXP16_
PARTITION FB3_17 clkdiv<6> clkdiv<5>

PARTITION FB5_1 counter<6> counter<5> counter<4> counter<3>
		 counter<2> counter<1> _12_ lcd_rw_OBUF
		 lcd_rs_OBUF counter<0> data_7_OBUFE state_FFT2
		 _10_ _13_ _11_ state_FFT1
		 data_3_OBUFE EXP17_

PARTITION FB7_1 EXP18_ _14_ data_0_OBUFE EXP19_
		 EXP20_ div_counter<0> EXP21_ data<4>_BUFR.MC
		 EXP22_ EXP23_ EXP24_ EXP25_
		 data<2>_BUFR.MC EXP26_ data<1>_BUFR.MC EXP27_
		 EXP28_ data<6>_BUFR.MC