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📄 stm32f10x_adc.txt

📁 STM32 ARM 处理器的ADC采样源代码
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;;;644        /* Calculate the mask to set */
;;;645        tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 13));
000212  f1a2f1a2          SUB      r6,r2,#0xd
000216  eb06eb06          ADD      r6,r6,r6,LSL #2
00021a  fa01fa01          LSL      r5,r1,r6
;;;646        /* Set the SQx bits for the selected rank */
;;;647        tmpreg1 |= tmpreg2;
00021e  432c              ORRS     r4,r4,r5
;;;648        /* Store the new register value */
;;;649        ADCx->SQR1 = tmpreg1;
000220  62c4              STR      r4,[r0,#0x2c]
                  |L1.546|
;;;650      }
;;;651    }
000222  bdf0              POP      {r4-r7,pc}
                          ENDP

                  ADC_ExternalTrigConvCmd PROC
;;;667    
;;;668      if (NewState != DISABLE)
000224  b121              CBZ      r1,|L1.560|
;;;669      {
;;;670        /* Enable the selected ADC conversion on external event */
;;;671        ADCx->CR2 |= CR2_EXTTRIG_Set;
000226  6882              LDR      r2,[r0,#8]
000228  f442f442          ORR      r2,r2,#0x100000
00022c  6082              STR      r2,[r0,#8]
00022e  e003              B        |L1.568|
                  |L1.560|
;;;672      }
;;;673      else
;;;674      {
;;;675        /* Disable the selected ADC conversion on external event */
;;;676        ADCx->CR2 &= CR2_EXTTRIG_Reset;
000230  6882              LDR      r2,[r0,#8]
000232  f422f422          BIC      r2,r2,#0x100000
000236  6082              STR      r2,[r0,#8]
                  |L1.568|
;;;677      }
;;;678    }
000238  4770              BX       lr
                          ENDP

                  ADC_GetConversionValue PROC
;;;687    u16 ADC_GetConversionValue(ADC_TypeDef* ADCx)
;;;688    {
00023a  4601              MOV      r1,r0
;;;689      /* Return the selected ADC conversion value */
;;;690      return (u16) ADCx->DR;
00023c  6cc8              LDR      r0,[r1,#0x4c]
00023e  b280              UXTH     r0,r0
;;;691    }
000240  4770              BX       lr
                          ENDP

                  ADC_GetDualModeConversionValue PROC
;;;701      /* Return the dual mode conversion value */
;;;702      return ADC1->DR;
000242  486c              LDR      r0,|L1.1012|
000244  6800              LDR      r0,[r0,#0]
;;;703    }
000246  4770              BX       lr
                          ENDP

                  ADC_AutoInjectedConvCmd PROC
;;;720    
;;;721      if (NewState != DISABLE)
000248  b121              CBZ      r1,|L1.596|
;;;722      {
;;;723        /* Enable the selected ADC automatic injected group conversion */
;;;724        ADCx->CR1 |= CR1_JAUTO_Set;
00024a  6842              LDR      r2,[r0,#4]
00024c  f442f442          ORR      r2,r2,#0x400
000250  6042              STR      r2,[r0,#4]
000252  e003              B        |L1.604|
                  |L1.596|
;;;725      }
;;;726      else
;;;727      {
;;;728        /* Disable the selected ADC automatic injected group conversion */
;;;729        ADCx->CR1 &= CR1_JAUTO_Reset;
000254  6842              LDR      r2,[r0,#4]
000256  f422f422          BIC      r2,r2,#0x400
00025a  6042              STR      r2,[r0,#4]
                  |L1.604|
;;;730      }
;;;731    }
00025c  4770              BX       lr
                          ENDP

                  ADC_InjectedDiscModeCmd PROC
;;;748    
;;;749      if (NewState != DISABLE)
00025e  b121              CBZ      r1,|L1.618|
;;;750      {
;;;751        /* Enable the selected ADC injected discontinuous mode */
;;;752        ADCx->CR1 |= CR1_JDISCEN_Set;
000260  6842              LDR      r2,[r0,#4]
000262  f442f442          ORR      r2,r2,#0x1000
000266  6042              STR      r2,[r0,#4]
000268  e003              B        |L1.626|
                  |L1.618|
;;;753      }
;;;754      else
;;;755      {
;;;756        /* Disable the selected ADC injected discontinuous mode */
;;;757        ADCx->CR1 &= CR1_JDISCEN_Reset;
00026a  6842              LDR      r2,[r0,#4]
00026c  f422f422          BIC      r2,r2,#0x1000
000270  6042              STR      r2,[r0,#4]
                  |L1.626|
;;;758      }
;;;759    }
000272  4770              BX       lr
                          ENDP

                  ADC_ExternalTrigInjectedConvConfig PROC
;;;788    {
;;;789      u32 tmpreg = 0;
000274  2200              MOVS     r2,#0
;;;790    
;;;791      /* Check the parameters */
;;;792      assert(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv));
;;;793    
;;;794      /* Get the old register value */
;;;795      tmpreg = ADCx->CR2;
000276  6882              LDR      r2,[r0,#8]
;;;796      /* Clear the old external event selection for injected group */
;;;797      tmpreg &= CR2_JEXTSEL_Reset;
000278  f422f422          BIC      r2,r2,#0x7000
;;;798      /* Set the external event selection for injected group */
;;;799      tmpreg |= ADC_ExternalTrigInjecConv;
00027c  430a              ORRS     r2,r2,r1
;;;800      /* Store the new register value */
;;;801      ADCx->CR2 = tmpreg;
00027e  6082              STR      r2,[r0,#8]
;;;802    }
000280  4770              BX       lr
                          ENDP

                  ADC_ExternalTrigInjectedConvCmd PROC
;;;819    
;;;820      if (NewState != DISABLE)
000282  b121              CBZ      r1,|L1.654|
;;;821      {
;;;822        /* Enable the selected ADC external event selection for injected group */
;;;823        ADCx->CR2 |= CR2_JEXTTRIG_Set;
000284  6882              LDR      r2,[r0,#8]
000286  f442f442          ORR      r2,r2,#0x8000
00028a  6082              STR      r2,[r0,#8]
00028c  e003              B        |L1.662|
                  |L1.654|
;;;824      }
;;;825      else
;;;826      {
;;;827        /* Disable the selected ADC external event selection for injected group */
;;;828        ADCx->CR2 &= CR2_JEXTTRIG_Reset;
00028e  6882              LDR      r2,[r0,#8]
000290  f422f422          BIC      r2,r2,#0x8000
000294  6082              STR      r2,[r0,#8]
                  |L1.662|
;;;829      }
;;;830    }
000296  4770              BX       lr
                          ENDP

                  ADC_SoftwareStartInjectedConvCmd PROC
;;;847    
;;;848      if (NewState != DISABLE)
000298  b121              CBZ      r1,|L1.676|
;;;849      {
;;;850        /* Enable the selected ADC external event selection for injected group */
;;;851        /* Starts the selected ADC injected conversion */
;;;852        ADCx->CR2 |= CR2_JEXTTRIG_JSWSTRT_Set;
00029a  6882              LDR      r2,[r0,#8]
00029c  f442f442          ORR      r2,r2,#0x208000
0002a0  6082              STR      r2,[r0,#8]
0002a2  e003              B        |L1.684|
                  |L1.676|
;;;853      }
;;;854      else
;;;855      {
;;;856        /* Stops the selected ADC injected conversion */
;;;857        /* Disable the selected ADC external event selection for injected group */
;;;858    	ADCx->CR2 &= CR2_JEXTTRIG_JSWSTRT_Reset;
0002a4  6882              LDR      r2,[r0,#8]
0002a6  f422f422          BIC      r2,r2,#0x208000
0002aa  6082              STR      r2,[r0,#8]
                  |L1.684|
;;;859      }
;;;860    }
0002ac  4770              BX       lr
                          ENDP

                  ADC_GetSoftwareStartInjectedConvCmdStatus PROC
;;;869    FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx)
;;;870    {
0002ae  4601              MOV      r1,r0
;;;871      FlagStatus bitstatus = RESET;
0002b0  2000              MOVS     r0,#0
;;;872    
;;;873      /* Check the status of JSWSTRT bit */
;;;874      if ((ADCx->CR2 & CR2_JSWSTRT_Set) != (u32)RESET)
0002b2  688a              LDR      r2,[r1,#8]
0002b4  f412f412          TST      r2,#0x200000
0002b8  d001              BEQ      |L1.702|
;;;875      {
;;;876        /* JSWSTRT bit is set */
;;;877        bitstatus = SET;
0002ba  2001              MOVS     r0,#1
0002bc  e000              B        |L1.704|
                  |L1.702|
;;;878      }
;;;879      else
;;;880      {
;;;881        /* JSWSTRT bit is reset */
;;;882        bitstatus = RESET;
0002be  2000              MOVS     r0,#0
                  |L1.704|
;;;883      }
;;;884      /* Return the JSWSTRT bit status */
;;;885      return  bitstatus;
;;;886    }
0002c0  4770              BX       lr
                          ENDP

                  ADC_InjectedChannelConfig PROC
;;;929    void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime)
;;;930    {
0002c2  b5f0              PUSH     {r4-r7,lr}
;;;931      u32 tmpreg1 = 0, tmpreg2 = 0;
0002c4  2400              MOVS     r4,#0
0002c6  2600              MOVS     r6,#0
;;;932      u8 tmpreg3 = 0;
0002c8  2500              MOVS     r5,#0
;;;933    
;;;934      /* Check the parameters */
;;;935      assert(IS_ADC_CHANNEL(ADC_Channel));
;;;936      assert(IS_ADC_INJECTED_RANK(Rank));
;;;937      assert(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
;;;938    
;;;939      /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
;;;940      if (ADC_Channel > ADC_Channel_9)
0002ca  2909              CMP      r1,#9
0002cc  dd11              BLE      |L1.754|
;;;941      {
;;;942        /* Get the old register value */
;;;943        tmpreg1 = ADCx->SMPR1;
0002ce  68c4              LDR      r4,[r0,#0xc]
;;;944        /* Calculate the mask to clear */
;;;945        tmpreg2 = (u32)SMPR1_SMP_Set << (3*(ADC_Channel - 10));
0002d0  f1a1f1a1          SUB      r7,r1,#0xa
0002d4  eb07eb07          ADD      r12,r7,r7,LSL #1
0002d8  2707              MOVS     r7,#7
0002da  fa07fa07          LSL      r6,r7,r12
;;;946        /* Clear the old discontinuous mode channel count */
;;;947        tmpreg1 &= ~tmpreg2;
0002de  43b4              BICS     r4,r4,r6
;;;948        /* Calculate the mask to set */
;;;949        tmpreg2 = (u32)ADC_SampleTime << (3*(ADC_Channel - 10));
0002e0  f1a1f1a1          SUB      r7,r1,#0xa
0002e4  eb07eb07          ADD      r7,r7,r7,LSL #1
0002e8  fa03fa03          LSL      r6,r3,r7
;;;950        /* Set the discontinuous mode channel count */
;;;951        tmpreg1 |= tmpreg2;
0002ec  4334              ORRS     r4,r4,r6
;;;952        /* Store the new register value */
;;;953        ADCx->SMPR1 = tmpreg1;
0002ee  60c4              STR      r4,[r0,#0xc]
0002f0  e00c              B        |L1.780|
                  |L1.754|
;;;954      }
;;;955      else /* ADC_Channel include in ADC_Channel_[0..9] */
;;;956      {
;;;957        /* Get the old register value */
;;;958        tmpreg1 = ADCx->SMPR2;
0002f2  6904              LDR      r4,[r0,#0x10]
;;;959        /* Calculate the mask to clear */
;;;960        tmpreg2 = (u32)SMPR2_SMP_Set << (3 * ADC_Channel);
0002f4  eb01eb01          ADD      r12,r1,r1,LSL #1
0002f8  2707              MOVS     r7,#7
0002fa  fa07fa07          LSL      r6,r7,r12
;;;961        /* Clear the old discontinuous mode channel count */
;;;962        tmpreg1 &= ~tmpreg2;
0002fe  43b4              BICS     r4,r4,r6
;;;963        /* Calculate the mask to set */
;;;964        tmpreg2 = (u32)ADC_SampleTime << (3 * ADC_Channel);
000300  eb01eb01          ADD      r7,r1,r1,LSL #1
000304  fa03fa03          LSL      r6,r3,r7
;;;965        /* Set the discontinuous mode channel count */
;;;966        tmpreg1 |= tmpreg2;
000308  4334              ORRS     r4,r4,r6
;;;967        /* Store the new register value */
;;;968        ADCx->SMPR2 = tmpreg1;
00030a  6104              STR      r4,[r0,#0x10]
                  |L1.780|
;;;969      }
;;;970    
;;;971      /* Rank configuration */
;;;972      /* Get the old register value */
;;;973      tmpreg1 = ADCx->JSQR;
00030c  6b84              LDR      r4,[r0,#0x38]
;;;974      /* Get JL value: Number = JL+1 */
;;;975      tmpreg3 =  (u8)((tmpreg1 & (u32)~JSQR_JL_Reset)>> 20);
00030e  f3c4f3c4          UBFX     r5,r4,#20,#2
;;;976      /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */

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