ccd.tan.summary

VHDL写的TC241 CCD控制器程序

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 15.000 ns
From           : PIXEL
To             : STATE[0]
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.000 ns
From           : SRG2~reg0
To             : SRG1
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 3.000 ns
From           : PIXEL
To             : STATE_OUT[0]~reg0
From Clock     : --
To Clock       : ADS
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 31.45 MHz ( period = 31.800 ns )
From           : lpm_counter:V_COUNTER_rtl_0|dffs[8]
To             : STATE[0]
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'ADS'
Slack          : N/A
Required Time  : None
Actual Time    : 100.00 MHz ( period = 10.000 ns )
From           : STATE_OUT[0]~reg0
To             : STATE_OUT[0]~reg0
From Clock     : ADS
To Clock       : ADS
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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