📄 ccd.sim.rpt
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; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[5] ; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[5] ; dataout ;
; |CCD|lpm_counter:H_COUNTER_rtl_1|dffs[5] ; |CCD|lpm_counter:H_COUNTER_rtl_1|dffs[5] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[6] ; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[6] ; dataout ;
; |CCD|lpm_counter:H_COUNTER_rtl_1|dffs[6] ; |CCD|lpm_counter:H_COUNTER_rtl_1|dffs[6] ; dataout ;
; |CCD|AD~reg0 ; |CCD|AD~reg0 ; dataout ;
; |CCD|lpm_counter:H_COUNTER_rtl_1|dffs[7] ; |CCD|lpm_counter:H_COUNTER_rtl_1|dffs[7] ; dataout ;
; |CCD|lpm_counter:H_COUNTER_rtl_1|dffs[8] ; |CCD|lpm_counter:H_COUNTER_rtl_1|dffs[8] ; dataout ;
; |CCD|P_CNT ; |CCD|P_CNT ; dataout ;
; |CCD|lpm_counter:H_COUNTER_CLR_rtl_2|dffs[0] ; |CCD|lpm_counter:H_COUNTER_CLR_rtl_2|dffs[0] ; dataout ;
; |CCD|Equal9~135 ; |CCD|Equal9~135 ; dataout ;
; |CCD|lpm_counter:H_COUNTER_CLR_rtl_2|dffs[1] ; |CCD|lpm_counter:H_COUNTER_CLR_rtl_2|dffs[1] ; dataout ;
; |CCD|lpm_counter:H_COUNTER_CLR_rtl_2|dffs[2] ; |CCD|lpm_counter:H_COUNTER_CLR_rtl_2|dffs[2] ; dataout ;
; |CCD|lpm_counter:H_COUNTER_CLR_rtl_2|dffs[3] ; |CCD|lpm_counter:H_COUNTER_CLR_rtl_2|dffs[3] ; dataout ;
; |CCD|STATE~1916 ; |CCD|STATE~1916 ; dataout ;
; |CCD|STATE[0] ; |CCD|STATE[0] ; dataout ;
; |CCD|L_CNT ; |CCD|L_CNT ; dataout ;
; |CCD|SAG~reg0 ; |CCD|SAG~reg0 ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0] ; dataout ;
; |CCD|Equal9~139 ; |CCD|Equal9~139 ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9] ; |CCD|lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9] ; dataout ;
; |CCD|STATE~1926 ; |CCD|STATE~1926 ; dataout ;
; |CCD|STATE[1] ; |CCD|STATE[1] ; dataout ;
; |CCD|SHD~reg0 ; |CCD|SHD~reg0 ; dataout ;
; |CCD|STATE_OUT[1]~reg0 ; |CCD|STATE_OUT[1]~reg0 ; dataout ;
; |CCD|STATE_OUT[1]~30 ; |CCD|STATE_OUT[1]~30 ; dataout ;
; |CCD|STATE_OUT[0]~reg0 ; |CCD|STATE_OUT[0]~reg0 ; dataout ;
; |CCD|TRG~reg0 ; |CCD|TRG~reg0 ; dataout ;
; |CCD|SRG2~reg0 ; |CCD|SRG2~reg0 ; dataout ;
; |CCD|SRG2~2 ; |CCD|SRG2~2 ; dataout ;
; |CCD|SRG3~reg0 ; |CCD|SRG3~reg0 ; dataout ;
; |CCD|STATE~1936 ; |CCD|STATE~1936 ; pexpout ;
; |CCD|STATE~1941 ; |CCD|STATE~1941 ; pexpout ;
; |CCD|Mux31~366 ; |CCD|Mux31~366 ; pexpout ;
; |CCD|STATE_SWITCH~210sexp ; |CCD|STATE_SWITCH~210sexp ; dataout ;
; |CCD|LessThan0~71sexp2 ; |CCD|LessThan0~71sexp2 ; dataout ;
; |CCD|LessThan0~71sexp3 ; |CCD|LessThan0~71sexp3 ; dataout ;
; |CCD|STATE~1918sexp1 ; |CCD|STATE~1918sexp1 ; dataout ;
; |CCD|CLK ; |CCD|CLK~corein ; dataout ;
; |CCD|RESET ; |CCD|RESET~corein ; dataout ;
; |CCD|RUN ; |CCD|RUN~corein ; dataout ;
; |CCD|PIXEL ; |CCD|PIXEL~corein ; dataout ;
; |CCD|ADS ; |CCD|ADS~corein ; dataout ;
; |CCD|AD ; |CCD|AD ; padio ;
; |CCD|IAG ; |CCD|IAG ; padio ;
; |CCD|SAG ; |CCD|SAG ; padio ;
; |CCD|SHD ; |CCD|SHD ; padio ;
; |CCD|SRG2 ; |CCD|SRG2 ; padio ;
; |CCD|TRG ; |CCD|TRG ; padio ;
; |CCD|STATE_OUT[0] ; |CCD|STATE_OUT[0] ; padio ;
; |CCD|STATE_OUT[1] ; |CCD|STATE_OUT[1] ; padio ;
; |CCD|SRG1 ; |CCD|SRG1 ; padio ;
; |CCD|SHP ; |CCD|SHP ; padio ;
; |CCD|SRG3 ; |CCD|SRG3 ; padio ;
; |CCD|COUNTERS~52 ; |CCD|COUNTERS~52 ; dataout ;
; |CCD|COUNTERS~53 ; |CCD|COUNTERS~53 ; dataout ;
; |CCD|Equal9~151 ; |CCD|Equal9~151 ; dataout ;
; |CCD|Equal9~152 ; |CCD|Equal9~152 ; dataout ;
; |CCD|Equal9~153 ; |CCD|Equal9~153 ; dataout ;
+----------------------------------------------+----------------------------------------------+------------------+
The following table displays output ports that do not toggle to 1 during simulation.
+--------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage ;
+------------------------------------------+------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+------------------------------------------+------------------------------------------+------------------+
; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[8] ; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[8] ; dataout ;
; |CCD|STATE~1910sexp ; |CCD|STATE~1910sexp ; dataout ;
+------------------------------------------+------------------------------------------+------------------+
The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage ;
+------------------------------------------+------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+------------------------------------------+------------------------------------------+------------------+
; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[7] ; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[7] ; dataout ;
; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[8] ; |CCD|lpm_counter:V_COUNTER_rtl_0|dffs[8] ; dataout ;
; |CCD|STATE[2] ; |CCD|STATE[2] ; dataout ;
; |CCD|STATE_OUT[1]~31 ; |CCD|STATE_OUT[1]~31 ; dataout ;
; |CCD|STATE~1910sexp ; |CCD|STATE~1910sexp ; dataout ;
+------------------------------------------+------------------------------------------+------------------+
+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage ;
+--------+------------+
+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
Info: Version 7.1 Build 156 04/30/2007 SJ Full Version
Info: Processing started: Fri Nov 30 15:28:47 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off CCD -c CCD
Info: Using vector source file "C:/Documents and Settings/Administrator/桌面/VHDL/CCD.vwf"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is 93.90 %
Info: Number of transitions in simulation is 187424
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
Info: Allocated 94 megabytes of memory during processing
Info: Processing ended: Fri Nov 30 15:29:01 2007
Info: Elapsed time: 00:00:14
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