📄 ccd.fit.rpt
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; PIA buffers ; 111 / 288 ( 39 % ) ;
; PIAs ; 129 / 288 ( 45 % ) ;
+----------------------------+--------------------+
+-----------------------------------------------------------------------------+
; LAB External Interconnect ;
+-----------------------------------------------+-----------------------------+
; LAB External Interconnects (Average = 16.13) ; Number of LABs (Total = 6) ;
+-----------------------------------------------+-----------------------------+
; 0 - 2 ; 2 ;
; 3 - 5 ; 0 ;
; 6 - 8 ; 0 ;
; 9 - 11 ; 1 ;
; 12 - 14 ; 1 ;
; 15 - 17 ; 1 ;
; 18 - 20 ; 0 ;
; 21 - 23 ; 0 ;
; 24 - 26 ; 0 ;
; 27 - 29 ; 1 ;
; 30 - 32 ; 2 ;
+-----------------------------------------------+-----------------------------+
+----------------------------------------------------------------------+
; LAB Macrocells ;
+----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 8.25) ; Number of LABs (Total = 6) ;
+----------------------------------------+-----------------------------+
; 0 ; 2 ;
; 1 ; 1 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 1 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 1 ;
; 12 ; 0 ;
; 13 ; 0 ;
; 14 ; 0 ;
; 15 ; 1 ;
; 16 ; 2 ;
+----------------------------------------+-----------------------------+
+---------------------------------------------------------+
; Parallel Expander ;
+--------------------------+------------------------------+
; Parallel Expander Length ; Number of Parallel Expanders ;
+--------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 5 ;
+--------------------------+------------------------------+
+-------------------------------------------------------------------------------+
; Shareable Expander ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders (Average = 1.50) ; Number of LABs (Total = 4) ;
+-------------------------------------------------+-----------------------------+
; 0 ; 4 ;
; 1 ; 1 ;
; 2 ; 0 ;
; 3 ; 1 ;
; 4 ; 2 ;
+-------------------------------------------------+-----------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC1 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], RESET, STATE[1], STATE[0], STATE[2] ; STATE[1] ;
; A ; LC14 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], STATE~1744, STATE~1707sexp1 ;
; A ; LC6 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], STATE~1744, STATE~1707sexp1 ;
; A ; LC4 ; CLK, STATE~1716, STATE_SWITCH~216sexp, STATE~1707sexp1, RESET ; CNT_1US[0], CNT_2US[0], CNT_8US[0], CNT_2US[1], CNT_8US[1], CNT_2US[2], CNT_8US[2], CNT_8US[3], CNT_8US[4], AD~reg0, FLAG, STATE~1716, P_CNT, Equal9~94, STATE[1], SHD~reg0, L_CNT, Equal9~98, STATE[2], SHP~reg0, CNT_1US[1], STATE_OUT[1]~reg0, STATE_OUT[0]~reg0, IAG~reg0, SAG~reg0, TRG~reg0, SRG3~reg0, SRG2~reg0, STATE~1739, STATE~1744, Mux34~252, STATE_SWITCH~216sexp, STATE~1707sexp1, Equal9~108, Equal9~109 ;
; A ; LC16 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], STATE~1744, STATE~1707sexp1 ;
; A ; LC3 ; CLK, CNT_8US[4], STATE[0], STATE[2], STATE[1], CNT_8US[2], CNT_8US[3], CNT_8US[0], CNT_8US[1], SHP~reg0 ; SHP~reg0, SHP ;
; A ; LC9 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; STATE~1744, STATE~1707sexp1 ;
; A ; LC15 ; lpm_counter:H_COUNTER_CLR_rtl_2|dffs[2], lpm_counter:H_COUNTER_CLR_rtl_2|dffs[1], lpm_counter:H_COUNTER_CLR_rtl_2|dffs[0], P_CNT, Equal9~108 ; STATE[1], STATE[2], STATE_SWITCH~216sexp ;
; A ; LC5 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], STATE~1744, STATE~1707sexp1 ;
; A ; LC8 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], STATE~1744, STATE~1707sexp1 ;
; A ; LC10 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], STATE~1744, STATE~1707sexp1 ;
; A ; LC7 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[5], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], STATE~1744, STATE~1707sexp1 ;
; A ; LC13 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[4], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[3], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[2], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[1], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[0], L_CNT, Equal9~109 ; lpm_counter:V_COUNTER_CLR_rtl_3|dffs[6], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[7], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[8], lpm_counter:V_COUNTER_CLR_rtl_3|dffs[9], STATE~1744, STATE~1707sexp1 ;
; A ; LC12 ; lpm_counter:H_COUNTER_CLR_rtl_2|dffs[1], lpm_counter:H_COUNTER_CLR_rtl_2|dffs[0], P_CNT, Equal9~108 ; lpm_counter:H_COUNTER_CLR_rtl_2|dffs[3], STATE[1], STATE[2], STATE_SWITCH~216sexp ⌨️ 快捷键说明
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