📄 rotary_counter.vhd
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library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Rotary_Counter is -- Generic ( bits : Integer := 12); --8 Port ( CLK : in STD_LOGIC; ROT_A : in STD_LOGIC; ROT_B : in STD_LOGIC; ROT_CENTER : in STD_LOGIC; COUNTER : out STD_LOGIC_VECTOR (11 downto 0));end Rotary_Counter;architecture Behavioral of Rotary_Counter is component Monoflop port ( Clk : IN std_logic; -- System Clock Trigger : IN std_logic; PULSOUT : OUT std_logic ); end component;signal rst : STD_LOGIC;signal sROT_A : STD_LOGIC;signal sROT_B : STD_LOGIC;signal sCount : STD_LOGIC_VECTOR (11 downto 0);signal sROT : STD_LOGIC_VECTOR (1 downto 0);type tstates is (state0, state1, state2, state3, state4, state5, state6);signal State: tstates;begin ------------------------rst <= ROT_CENTER;MF1: Monoflop port map (Clk => CLK, Trigger => ROT_A, PULSOUT => sROT_A);MF2: Monoflop port map (Clk => CLK, Trigger => ROT_B, PULSOUT => sROT_B);sROT(0) <= ROT_A or sROT_A;sROT(1) <= ROT_B or sROT_B;process (clk, rst)begin if rst='1' then state <= state0; sCount<= (others => '0'); elsif rising_edge(Clk) then case state is when state0 => if sROt = "11" then state <= state0; elsif sROt = "01" then state <= state1; else state <= state4; end if; when state1 => if sROt = "01" then state <= state1; elsif sROt = "00" then state <= state2; else state <= state0; end if; when state2 => if sROt = "00" then state <= state2; elsif sROt = "10" then state <= state3; else state <= state1; end if; when state3 => if sROt = "10" then state <= state3; elsif sROt = "11" then state <= state0; sCount <= sCount + 1; else state <= state2; end if; when state4 => if sROt = "10" then state <= state4; elsif sROt = "00" then state <= state5; else state <= state0; end if; when state5 => if sROt = "00" then state <= state5; elsif sROt = "01" then state <= state6; else state <= state4; end if; when state6 => if sROt = "01" then state <= state6; elsif sROt = "11" then state <= state0; sCount <= sCount - 1; else state <= state5; end if; when others => state <= state0; end case; end if;end process;COUNTER <= sCount;end Behavioral;
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