top.fit.qmsg

清华大学实验箱自带实验程序

{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_LUT_IO_RAM_PACKING" "" "Info: Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "5.162 ns register register " "Info: Estimated most critical path is register to register delay of 5.162 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns vgacore:showdata\|vcnt\[0\] 1 REG LAB_X15_Y12 16 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X15_Y12; Fanout = 16; REG Node = 'vgacore:showdata\|vcnt\[0\]'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "" { vgacore:showdata|vcnt[0] } "NODE_NAME" } "" } } { "vgacore.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/vgacore.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.210 ns) + CELL(0.575 ns) 1.785 ns ball:drawball\|LessThan~2557COUT1_2671 2 COMB LAB_X14_Y9 1 " "Info: 2: + IC(1.210 ns) + CELL(0.575 ns) = 1.785 ns; Loc. = LAB_X14_Y9; Fanout = 1; COMB Node = 'ball:drawball\|LessThan~2557COUT1_2671'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "1.785 ns" { vgacore:showdata|vcnt[0] ball:drawball|LessThan~2557COUT1_2671 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.865 ns ball:drawball\|LessThan~2487COUT1_2672 3 COMB LAB_X14_Y9 1 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.865 ns; Loc. = LAB_X14_Y9; Fanout = 1; COMB Node = 'ball:drawball\|LessThan~2487COUT1_2672'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "0.080 ns" { ball:drawball|LessThan~2557COUT1_2671 ball:drawball|LessThan~2487COUT1_2672 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.945 ns ball:drawball\|LessThan~2417COUT1_2673 4 COMB LAB_X14_Y9 1 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.945 ns; Loc. = LAB_X14_Y9; Fanout = 1; COMB Node = 'ball:drawball\|LessThan~2417COUT1_2673'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "0.080 ns" { ball:drawball|LessThan~2487COUT1_2672 ball:drawball|LessThan~2417COUT1_2673 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 2.025 ns ball:drawball\|LessThan~2347COUT1_2674 5 COMB LAB_X14_Y9 1 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 2.025 ns; Loc. = LAB_X14_Y9; Fanout = 1; COMB Node = 'ball:drawball\|LessThan~2347COUT1_2674'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "0.080 ns" { ball:drawball|LessThan~2417COUT1_2673 ball:drawball|LessThan~2347COUT1_2674 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 2.283 ns ball:drawball\|LessThan~2277 6 COMB LAB_X14_Y9 1 " "Info: 6: + IC(0.000 ns) + CELL(0.258 ns) = 2.283 ns; Loc. = LAB_X14_Y9; Fanout = 1; COMB Node = 'ball:drawball\|LessThan~2277'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "0.258 ns" { ball:drawball|LessThan~2347COUT1_2674 ball:drawball|LessThan~2277 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.679 ns) 2.962 ns ball:drawball\|LessThan~1955 7 COMB LAB_X14_Y9 1 " "Info: 7: + IC(0.000 ns) + CELL(0.679 ns) = 2.962 ns; Loc. = LAB_X14_Y9; Fanout = 1; COMB Node = 'ball:drawball\|LessThan~1955'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "0.679 ns" { ball:drawball|LessThan~2277 ball:drawball|LessThan~1955 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.929 ns) + CELL(0.442 ns) 4.333 ns ball:drawball\|drawball~114 8 COMB LAB_X15_Y10 1 " "Info: 8: + IC(0.929 ns) + CELL(0.442 ns) = 4.333 ns; Loc. = LAB_X15_Y10; Fanout = 1; COMB Node = 'ball:drawball\|drawball~114'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "1.371 ns" { ball:drawball|LessThan~1955 ball:drawball|drawball~114 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.222 ns) + CELL(0.607 ns) 5.162 ns ball:drawball\|ballrgb\[6\] 9 REG LAB_X15_Y10 2 " "Info: 9: + IC(0.222 ns) + CELL(0.607 ns) = 5.162 ns; Loc. = LAB_X15_Y10; Fanout = 2; REG Node = 'ball:drawball\|ballrgb\[6\]'" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "0.829 ns" { ball:drawball|drawball~114 ball:drawball|ballrgb[6] } "NODE_NAME" } "" } } { "ball.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/ball.vhd" 17 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.801 ns 54.26 % " "Info: Total cell delay = 2.801 ns ( 54.26 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.361 ns 45.74 % " "Info: Total interconnect delay = 2.361 ns ( 45.74 % )" {  } {  } 0}  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "5.162 ns" { vgacore:showdata|vcnt[0] ball:drawball|LessThan~2557COUT1_2671 ball:drawball|LessThan~2487COUT1_2672 ball:drawball|LessThan~2417COUT1_2673 ball:drawball|LessThan~2347COUT1_2674 ball:drawball|LessThan~2277 ball:drawball|LessThan~1955 ball:drawball|drawball~114 ball:drawball|ballrgb[6] } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:01 " "Info: Fitter placement operations ending: elapsed time is 00:00:01" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 9 " "Info: Average interconnect usage is 2% of the available device resources. Peak interconnect usage is 9%." {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "mouse:mousedata\|watchcount~15 " "Info: Node mouse:mousedata\|watchcount~15 uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear mouse:mousedata\|debounce_timer_count\[0\] " "Info: Port clear -- assigned as a global for destination node mouse:mousedata\|debounce_timer_count\[0\] -- routed using non-global resources" {  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "" { mouse:mousedata|debounce_timer_count[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "mouse:mousedata\|debounce_timer_count\[0\]" } } } } { "mouse.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/mouse.vhd" 43 -1 0 } } { "D:/altera/SOPCtrain/gameksinghua/top.fld" "" { Floorplan "D:/altera/SOPCtrain/gameksinghua/top.fld" "" "" { mouse:mousedata|debounce_timer_count[0] } "NODE_NAME" } }  } 0}  } { { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "" { mouse:mousedata|watchcount~15 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "mouse:mousedata\|watchcount~15" } } } } { "D:/altera/SOPCtrain/gameksinghua/top.fld" "" { Floorplan "D:/altera/SOPCtrain/gameksinghua/top.fld" "" "" { mouse:mousedata|watchcount~15 } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_ALL_OUTPUT_ENABLE_GROUPS" "" "Info: The following groups of pins have the same output enable" { { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP" "mouse:mousedata\|m2_state.m2_hold_clk_l " "Info: The following pins have the same output enable: mouse:mousedata\|m2_state.m2_hold_clk_l" { { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional ps2clk LVTTL " "Info: Type bidirectional pin ps2clk uses the LVTTL I/O standard" {  } { { "top.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/top.vhd" 9 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ps2clk" } } } } { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "" { ps2clk } "NODE_NAME" } "" } } { "D:/altera/SOPCtrain/gameksinghua/top.fld" "" { Floorplan "D:/altera/SOPCtrain/gameksinghua/top.fld" "" "" { ps2clk } "NODE_NAME" } }  } 0}  } {  } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP" "mouse:mousedata\|reduce_or~44 " "Info: The following pins have the same output enable: mouse:mousedata\|reduce_or~44" { { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional ps2data LVTTL " "Info: Type bidirectional pin ps2data uses the LVTTL I/O standard" {  } { { "top.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/top.vhd" 10 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ps2data" } } } } { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "" { ps2data } "NODE_NAME" } "" } } { "D:/altera/SOPCtrain/gameksinghua/top.fld" "" { Floorplan "D:/altera/SOPCtrain/gameksinghua/top.fld" "" "" { ps2data } "NODE_NAME" } }  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 20 18:39:55 2006 " "Info: Processing ended: Fri Oct 20 18:39:55 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Info: Elapsed time: 00:00:09" {  } {  } 0}  } {  } 0}