top.fit.qmsg

清华大学实验箱自带实验程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 20 18:39:46 2006 " "Info: Processing started: Fri Oct 20 18:39:46 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off top -c top " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off top -c top" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "top EP1C6Q240C8 " "Info: Selected device EP1C6Q240C8 for design \"top\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C12Q240C8 " "Info: Device EP1C12Q240C8 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "sysclk Global clock in PIN 28 " "Info: Automatically promoted signal \"sysclk\" to use Global clock in PIN 28" {  } { { "top.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/top.vhd" 7 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "count64:clocknum\|count\[6\] Global clock " "Info: Automatically promoted some destinations of signal \"count64:clocknum\|count\[6\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "count64:clocknum\|count\[6\] " "Info: Destination \"count64:clocknum\|count\[6\]\" may be non-global or may not use global clock" {  } { { "count64.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/count64.vhd" 14 -1 0 } }  } 0}  } { { "count64.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/count64.vhd" 14 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "vgacore:showdata\|vcnt\[9\] Global clock " "Info: Automatically promoted some destinations of signal \"vgacore:showdata\|vcnt\[9\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "vgacore:showdata\|vcnt\[9\] " "Info: Destination \"vgacore:showdata\|vcnt\[9\]\" may be non-global or may not use global clock" {  } { { "vgacore.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/vgacore.vhd" 13 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "vgacore:showdata\|D~290 " "Info: Destination \"vgacore:showdata\|D~290\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "target:drawtarget\|drawtarget~86 " "Info: Destination \"target:drawtarget\|drawtarget~86\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "ball:drawball\|LessThan~1930 " "Info: Destination \"ball:drawball\|LessThan~1930\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "ball:drawball\|LessThan~1935 " "Info: Destination \"ball:drawball\|LessThan~1935\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "ball:drawball\|LessThan~1950 " "Info: Destination \"ball:drawball\|LessThan~1950\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "ball:drawball\|LessThan~1955 " "Info: Destination \"ball:drawball\|LessThan~1955\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "ball:drawball\|LessThan~1970 " "Info: Destination \"ball:drawball\|LessThan~1970\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "ball:drawball\|LessThan~1975 " "Info: Destination \"ball:drawball\|LessThan~1975\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "board:drawboard\|drawboard~148 " "Info: Destination \"board:drawboard\|drawboard~148\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_LIMITED_TO_SUB" "10 " "Info: Limited to 10 non-global destinations" {  } {  } 0}  } { { "vgacore.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/vgacore.vhd" 13 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "vgacore:showdata\|vcnt\[6\] Global clock " "Info: Automatically promoted some destinations of signal \"vgacore:showdata\|vcnt\[6\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "vgacore:showdata\|vcnt\[6\] " "Info: Destination \"vgacore:showdata\|vcnt\[6\]\" may be non-global or may not use global clock" {  } { { "vgacore.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/vgacore.vhd" 13 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "vgacore:showdata\|vsyncb " "Info: Destination \"vgacore:showdata\|vsyncb\" may be non-global or may not use global clock" {  } { { "vgacore.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/vgacore.vhd" 11 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "vgacore:showdata\|D~291 " "Info: Destination \"vgacore:showdata\|D~291\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "target:drawtarget\|drawtarget~86 " "Info: Destination \"target:drawtarget\|drawtarget~86\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "board:drawboard\|drawboard~147 " "Info: Destination \"board:drawboard\|drawboard~147\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "frame:drawback\|XX~1019 " "Info: Destination \"frame:drawback\|XX~1019\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "frame:drawback\|XX~1020 " "Info: Destination \"frame:drawback\|XX~1020\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "frame:drawback\|XX~1023 " "Info: Destination \"frame:drawback\|XX~1023\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "vgacore:showdata\|LessThan~615 " "Info: Destination \"vgacore:showdata\|LessThan~615\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "ball:drawball\|LessThan~2112 " "Info: Destination \"ball:drawball\|LessThan~2112\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_LIMITED_TO_SUB" "10 " "Info: Limited to 10 non-global destinations" {  } {  } 0}  } { { "vgacore.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/vgacore.vhd" 13 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "vgacore:showdata\|hsyncb Global clock " "Info: Automatically promoted some destinations of signal \"vgacore:showdata\|hsyncb\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "hsyncb " "Info: Destination \"hsyncb\" may be non-global or may not use global clock" {  } { { "top.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/top.vhd" 11 -1 0 } }  } 0}  } { { "vgacore.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/vgacore.vhd" 10 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "target:drawtarget\|sampcnt\[5\] Global clock " "Info: Automatically promoted some destinations of signal \"target:drawtarget\|sampcnt\[5\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "target:drawtarget\|sampcnt\[5\] " "Info: Destination \"target:drawtarget\|sampcnt\[5\]\" may be non-global or may not use global clock" {  } { { "target.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/target.vhd" 21 -1 0 } }  } 0}  } { { "target.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/target.vhd" 21 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "resn Global clock in PIN 50 " "Info: Automatically promoted some destinations of signal \"resn\" to use Global clock in PIN 50" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mouse:mousedata\|watchcount~15 " "Info: Destination \"mouse:mousedata\|watchcount~15\" may be non-global or may not use global clock" {  } {  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mouse:mousedata\|mousexx\[9\]~0 " "Info: Destination \"mouse:mousedata\|mousexx\[9\]~0\" may be non-global or may not use global clock" {  } { { "mouse.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/mouse.vhd" 54 -1 0 } }  } 0}  } { { "top.vhd" "" { Text "D:/altera/SOPCtrain/gameksinghua/top.vhd" 8 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "mouse:mousedata\|watchcount~15 Global clock " "Info: Automatically promoted signal \"mouse:mousedata\|watchcount~15\" to use Global clock" {  } { { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "mouse:mousedata\|watchcount~15" } } } } { "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" "" { Report "D:/altera/SOPCtrain/gameksinghua/db/top_cmp.qrpt" Compiler "top" "UNKNOWN" "V1" "D:/altera/SOPCtrain/gameksinghua/db/top.quartus_db" { Floorplan "D:/altera/SOPCtrain/gameksinghua/" "" "" { mouse:mousedata|watchcount~15 } "NODE_NAME" } "" } } { "D:/altera/SOPCtrain/gameksinghua/top.fld" "" { Floorplan "D:/altera/SOPCtrain/gameksinghua/top.fld" "" "" { mouse:mousedata|watchcount~15 } "NODE_NAME" } }  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0}