top_timesim.vhd

清华大学实验箱自带实验程序

  signal drawback_syn559_FROM : STD_LOGIC; 
  signal showdata_N160_CYINIT : STD_LOGIC; 
  signal showdata_N160_XORG : STD_LOGIC; 
  signal showdata_C13_C9_C1_O : STD_LOGIC; 
  signal showdata_N160_LOGIC_ZERO : STD_LOGIC; 
  signal showdata_N160_CYMUXG : STD_LOGIC; 
  signal showdata_N160_GROM : STD_LOGIC; 
  signal showdata_N160_FROM : STD_LOGIC; 
  signal showdata_N160_XORF : STD_LOGIC; 
  signal drawback_syn572_GROM : STD_LOGIC; 
  signal drawback_syn572_FROM : STD_LOGIC; 
  signal showdata_N162_CYINIT : STD_LOGIC; 
  signal showdata_N162_XORG : STD_LOGIC; 
  signal showdata_C13_C11_C1_O : STD_LOGIC; 
  signal showdata_N162_LOGIC_ZERO : STD_LOGIC; 
  signal showdata_N162_CYMUXG : STD_LOGIC; 
  signal showdata_N162_GROM : STD_LOGIC; 
  signal showdata_N162_FROM : STD_LOGIC; 
  signal showdata_N162_XORF : STD_LOGIC; 
  signal drawboard_syn906_GROM : STD_LOGIC; 
  signal drawboard_syn906_FROM : STD_LOGIC; 
  signal showdata_N164_CYINIT : STD_LOGIC; 
  signal hcnt_10_rt : STD_LOGIC; 
  signal showdata_N164_XORF : STD_LOGIC; 
  signal drawboard_C8_C3_C1_O_LOGIC_ZERO : STD_LOGIC; 
  signal drawboard_C8_C3_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C8_C2_C1_O : STD_LOGIC; 
  signal drawboard_C8_C3_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C8_C3_net : STD_LOGIC; 
  signal drawboard_C8_C2_net : STD_LOGIC; 
  signal boardrgb_5_FFY_RST : STD_LOGIC; 
  signal boardrgb_5_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal drawboard_C8_C5_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C8_C4_C1_O : STD_LOGIC; 
  signal drawboard_C8_C5_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C8_C5_net : STD_LOGIC; 
  signal drawboard_C8_C4_net : STD_LOGIC; 
  signal drawboard_C8_C7_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C8_C6_C1_O : STD_LOGIC; 
  signal drawboard_C8_C7_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C8_C7_net : STD_LOGIC; 
  signal drawboard_C8_C6_net : STD_LOGIC; 
  signal mousedata_q_12_FFY_RST : STD_LOGIC; 
  signal mousedata_q_12_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_12_FFX_RST : STD_LOGIC; 
  signal mousedata_q_12_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal drawboard_C8_C9_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C8_C8_C1_O : STD_LOGIC; 
  signal drawboard_C8_C9_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C8_C9_net : STD_LOGIC; 
  signal drawboard_C8_C8_net : STD_LOGIC; 
  signal drawboard_C8_C11_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C8_C10_C1_O : STD_LOGIC; 
  signal drawboard_C8_C11_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C8_C11_net : STD_LOGIC; 
  signal drawboard_C8_C10_net : STD_LOGIC; 
  signal showdata_syn1277_CYINIT : STD_LOGIC; 
  signal showdata_syn1277_CYMUXF : STD_LOGIC; 
  signal showdata_syn1277_GROM : STD_LOGIC; 
  signal drawboard_N583 : STD_LOGIC; 
  signal showdata_syn1277_LOGIC_ZERO : STD_LOGIC; 
  signal mousedata_q_22_FFY_RST : STD_LOGIC; 
  signal mousedata_q_22_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_22_FFX_RST : STD_LOGIC; 
  signal mousedata_q_22_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal drawboard_C9_C3_C1_O_LOGIC_ZERO : STD_LOGIC; 
  signal drawboard_C9_C3_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C9_C2_C1_O : STD_LOGIC; 
  signal drawboard_C9_C3_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C9_C3_net : STD_LOGIC; 
  signal drawboard_C9_C2_net : STD_LOGIC; 
  signal mousedata_q_14_FFY_RST : STD_LOGIC; 
  signal mousedata_q_14_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_14_FFX_RST : STD_LOGIC; 
  signal mousedata_q_14_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal drawboard_C9_C5_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C9_C4_C1_O : STD_LOGIC; 
  signal drawboard_C9_C5_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C9_C5_net : STD_LOGIC; 
  signal drawboard_C9_C4_net : STD_LOGIC; 
  signal drawboard_C9_C7_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C9_C6_C1_O : STD_LOGIC; 
  signal drawboard_C9_C7_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C9_C7_net : STD_LOGIC; 
  signal drawboard_C9_C6_net : STD_LOGIC; 
  signal drawboard_C9_C9_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C9_C8_C1_O : STD_LOGIC; 
  signal drawboard_C9_C9_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C9_C9_net : STD_LOGIC; 
  signal drawboard_C9_C8_net : STD_LOGIC; 
  signal drawboard_C9_C11_C1_O_CYINIT : STD_LOGIC; 
  signal drawboard_C9_C10_C1_O : STD_LOGIC; 
  signal drawboard_C9_C11_C1_O_CYMUXG : STD_LOGIC; 
  signal drawboard_C9_C11_net : STD_LOGIC; 
  signal drawboard_C9_C10_net : STD_LOGIC; 
  signal mousedata_q_32_FFY_RST : STD_LOGIC; 
  signal mousedata_q_32_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_32_FFX_RST : STD_LOGIC; 
  signal mousedata_q_32_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal drawboard_N42_CYINIT : STD_LOGIC; 
  signal drawboard_N42_CYMUXF : STD_LOGIC; 
  signal drawboard_N584 : STD_LOGIC; 
  signal mousedata_N57_LOGIC_ZERO : STD_LOGIC; 
  signal mousedata_N57_CYINIT : STD_LOGIC; 
  signal mousedata_N57_XORG : STD_LOGIC; 
  signal mousedata_C13_C2_C2_O : STD_LOGIC; 
  signal mousedata_N57_CYMUXG : STD_LOGIC; 
  signal mousedata_C13_C3_N5 : STD_LOGIC; 
  signal mousedata_C13_C2_N5 : STD_LOGIC; 
  signal mousedata_N57_XORF : STD_LOGIC; 
  signal mousedata_q_24_FFY_RST : STD_LOGIC; 
  signal mousedata_q_24_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_24_FFX_RST : STD_LOGIC; 
  signal mousedata_q_24_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_N59_CYINIT : STD_LOGIC; 
  signal mousedata_N59_XORG : STD_LOGIC; 
  signal mousedata_C13_C4_C2_O : STD_LOGIC; 
  signal mousedata_N59_CYMUXG : STD_LOGIC; 
  signal mousedata_C13_C5_N5 : STD_LOGIC; 
  signal mousedata_C13_C4_N5 : STD_LOGIC; 
  signal mousedata_N59_XORF : STD_LOGIC; 
  signal mousedata_q_16_FFY_RST : STD_LOGIC; 
  signal mousedata_q_16_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_16_FFX_RST : STD_LOGIC; 
  signal mousedata_q_16_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_N61_CYINIT : STD_LOGIC; 
  signal mousedata_N61_XORG : STD_LOGIC; 
  signal mousedata_C13_C6_C2_O : STD_LOGIC; 
  signal mousedata_N61_CYMUXG : STD_LOGIC; 
  signal mousedata_C13_C7_N5 : STD_LOGIC; 
  signal mousedata_C13_C6_N5 : STD_LOGIC; 
  signal mousedata_N61_XORF : STD_LOGIC; 
  signal mousedata_N63_CYINIT : STD_LOGIC; 
  signal mousedata_N63_XORG : STD_LOGIC; 
  signal mousedata_C13_C8_C2_O : STD_LOGIC; 
  signal mousedata_N63_CYMUXG : STD_LOGIC; 
  signal mousedata_C13_C9_N5 : STD_LOGIC; 
  signal mousedata_C13_C8_N5 : STD_LOGIC; 
  signal mousedata_N63_XORF : STD_LOGIC; 
  signal mousedata_N65_CYINIT : STD_LOGIC; 
  signal mousedata_N65_XORG : STD_LOGIC; 
  signal mousedata_C13_C10_C2_O : STD_LOGIC; 
  signal mousedata_C13_C11_N5 : STD_LOGIC; 
  signal mousedata_C13_C10_N5 : STD_LOGIC; 
  signal mousedata_N65_XORF : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_LOGIC_ONE : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_CYINIT : STD_LOGIC; 
  signal mousedata_N177 : STD_LOGIC; 
  signal mousedata_C15_C3_C1_O : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_LOGIC_ZERO : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_CYMUXG : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_GROM : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_FROM : STD_LOGIC; 
  signal mousedata_N176 : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_FFY_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_FFX_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_0_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_26_FFY_RST : STD_LOGIC; 
  signal mousedata_q_26_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_26_FFX_RST : STD_LOGIC; 
  signal mousedata_q_26_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_CYINIT : STD_LOGIC; 
  signal mousedata_N179 : STD_LOGIC; 
  signal mousedata_C15_C5_C1_O : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_LOGIC_ZERO : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_CYMUXG : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_GROM : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_FROM : STD_LOGIC; 
  signal mousedata_N178 : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_FFY_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_FFX_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_2_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_18_FFY_RST : STD_LOGIC; 
  signal mousedata_q_18_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_18_FFX_RST : STD_LOGIC; 
  signal mousedata_q_18_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_CYINIT : STD_LOGIC; 
  signal mousedata_N181 : STD_LOGIC; 
  signal mousedata_C15_C7_C1_O : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_LOGIC_ZERO : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_CYMUXG : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_GROM : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_FROM : STD_LOGIC; 
  signal mousedata_N180 : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_FFY_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_FFX_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_4_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_CYINIT : STD_LOGIC; 
  signal mousedata_N183 : STD_LOGIC; 
  signal mousedata_C15_C9_C1_O : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_LOGIC_ZERO : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_CYMUXG : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_GROM : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_FROM : STD_LOGIC; 
  signal mousedata_N182 : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_FFY_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_FFX_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_6_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_8_CYINIT : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_8_rt : STD_LOGIC; 
  signal mousedata_N184 : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_8_FFX_RST : STD_LOGIC; 
  signal mousedata_watchdog_timer_count_8_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_N74_LOGIC_ONE : STD_LOGIC; 
  signal showdata_N74_CYINIT : STD_LOGIC; 
  signal showdata_N74_XORG : STD_LOGIC; 
  signal showdata_C10_C3_C1_O : STD_LOGIC; 
  signal showdata_N74_LOGIC_ZERO : STD_LOGIC; 
  signal showdata_N74_CYMUXG : STD_LOGIC; 
  signal showdata_N74_GROM : STD_LOGIC; 
  signal showdata_N74_FROM : STD_LOGIC; 
  signal showdata_N74_XORF : STD_LOGIC; 
  signal mousedata_q_20_FFY_RST : STD_LOGIC; 
  signal mousedata_q_20_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_20_FFX_RST : STD_LOGIC; 
  signal mousedata_q_20_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_N76_CYINIT : STD_LOGIC; 
  signal showdata_N76_XORG : STD_LOGIC; 
  signal showdata_C10_C5_C1_O : STD_LOGIC; 
  signal showdata_N76_LOGIC_ZERO : STD_LOGIC; 
  signal showdata_N76_CYMUXG : STD_LOGIC; 
  signal showdata_N76_GROM : STD_LOGIC; 
  signal showdata_N76_FROM : STD_LOGIC; 
  signal showdata_N76_XORF : STD_LOGIC; 
  signal mousedata_q_28_FFY_RST : STD_LOGIC; 
  signal mousedata_q_28_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_28_FFX_RST : STD_LOGIC; 
  signal mousedata_q_28_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_N78_CYINIT : STD_LOGIC; 
  signal showdata_N78_XORG : STD_LOGIC; 
  signal showdata_C10_C7_C1_O : STD_LOGIC; 
  signal showdata_N78_LOGIC_ZERO : STD_LOGIC; 
  signal showdata_N78_CYMUXG : STD_LOGIC; 
  signal showdata_N78_GROM : STD_LOGIC; 
  signal showdata_N78_FROM : STD_LOGIC; 
  signal showdata_N78_XORF : STD_LOGIC; 
  signal showdata_N80_CYINIT : STD_LOGIC; 
  signal showdata_N80_XORG : STD_LOGIC; 
  signal showdata_C10_C9_C1_O : STD_LOGIC; 
  signal showdata_N80_LOGIC_ZERO : STD_LOGIC; 
  signal showdata_N80_CYMUXG : STD_LOGIC; 
  signal showdata_N80_GROM : STD_LOGIC; 
  signal showdata_N80_FROM : STD_LOGIC; 
  signal showdata_N80_XORF : STD_LOGIC; 
  signal mousedata_q_30_FFY_RST : STD_LOGIC; 
  signal mousedata_q_30_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_30_FFX_RST : STD_LOGIC; 
  signal mousedata_q_30_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_N82_CYINIT : STD_LOGIC; 
  signal showdata_N82_XORG : STD_LOGIC; 
  signal showdata_C10_C11_C1_O : STD_LOGIC; 
  signal vcnt_9_rt : STD_LOGIC; 
  signal showdata_N82_FROM : STD_LOGIC; 
  signal showdata_N82_XORF : STD_LOGIC; 
  signal showdata_N82_LOGIC_ZERO : STD_LOGIC; 
  signal boardrgb_4_GROM : STD_LOGIC; 
  signal boardrgb_4_FROM : STD_LOGIC; 
  signal boardrgb_4_FFY_RST : STD_LOGIC; 
  signal boardrgb_4_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal boardrgb_4_FFX_RST : STD_LOGIC; 
  signal boardrgb_4_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_C20_N3 : STD_LOGIC; 
  signal hcnt_0_FROM : STD_LOGIC; 
  signal hcnt_0_FFY_RST : STD_LOGIC; 
  signal hcnt_0_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal drawback_syn550_GROM : STD_LOGIC; 
  signal drawback_syn550_FROM : STD_LOGIC; 
  signal drawback_syn541_GROM : STD_LOGIC; 
  signal backcolor_7_GROM : STD_LOGIC; 
  signal backcolor_7_FROM : STD_LOGIC; 
  signal backcolor_7_FFY_RST : STD_LOGIC; 
  signal backcolor_7_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal backcolor_7_FFX_RST : STD_LOGIC; 
  signal backcolor_7_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal drawback_syn558_GROM : STD_LOGIC; 
  signal drawback_syn558_FROM : STD_LOGIC; 
  signal showdata_C20_N14 : STD_LOGIC; 
  signal showdata_C20_N19 : STD_LOGIC; 
  signal hcnt_3_FFY_RST : STD_LOGIC; 
  signal hcnt_3_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal hcnt_3_FFX_RST : STD_LOGIC; 
  signal hcnt_3_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_m2_state_0_LOGIC_ZERO : STD_LOGIC; 
  signal mousedata_C28_N33 : STD_LOGIC; 
  signal mousedata_m2_state_0_FROM : STD_LOGIC; 
  signal mousedata_m2_state_0_FFY_RST : STD_LOGIC; 
  signal mousedata_m2_state_0_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_m2_state_0_FFX_SET : STD_LOGIC; 
  signal mousedata_m2_state_0_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_6_FFY_RST : STD_LOGIC; 
  signal mousedata_q_6_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_6_FFX_RST : STD_LOGIC; 
  signal mousedata_q_6_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_C20_N24 : STD_LOGIC; 
  signal showdata_C20_N29 : STD_LOGIC; 
  signal hcnt_5_FFY_RST : STD_LOGIC; 
  signal hcnt_5_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal hcnt_5_FFX_RST : STD_LOGIC; 
  signal hcnt_5_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_8_FFY_RST : STD_LOGIC; 
  signal mousedata_q_8_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_8_FFX_RST : STD_LOGIC; 
  signal mousedata_q_8_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_C20_N34 : STD_LOGIC; 
  signal showdata_C20_N39 : STD_LOGIC; 
  signal hcnt_7_FFY_RST : STD_LOGIC; 
  signal hcnt_7_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal hcnt_7_FFX_RST : STD_LOGIC; 
  signal hcnt_7_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_10_FFY_RST : STD_LOGIC; 
  signal mousedata_q_10_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal mousedata_q_10_FFX_RST : STD_LOGIC; 
  signal mousedata_q_10_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_C20_N44 : STD_LOGIC; 
  signal showdata_C20_N49 : STD_LOGIC; 
  signal hcnt_9_FFY_RST : STD_LOGIC; 
  signal hcnt_9_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal hcnt_9_FFX_RST : STD_LOGIC; 
  signal hcnt_9_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal drawback_syn564_GROM : STD_LOGIC; 
  signal drawback_syn564_FROM : STD_LOGIC; 
  signal drawback_syn565_GROM : STD_LOGIC; 
  signal drawback_syn565_FROM : STD_LOGIC; 
  signal showdata_n270 : STD_LOGIC; 
  signal N24_FROM : STD_LOGIC; 
  signal N24_FFY_SET : STD_LOGIC; 
  signal N24_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal showdata_syn366_GROM : STD_LOGIC; 
  signal showdata_syn366_FROM : STD_LOGIC; 
  signal showdata_C20_N54 : STD_LOGIC; 
  signal showdata_C20_N9 : STD_LOGIC; 
  signal hcnt_1_FFY_RST : STD_LOGIC; 
  signal hcnt_1_FFY_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal hcnt_1_FFX_RST : STD_LOGIC; 
  signal hcnt_1_FFX_ASYNC_FF_GSR_OR : STD_LOGIC; 
  signal GSR : STD_LOGIC; 
  signal GTS : STD_LOGIC; 
  signal VCC : STD_LOGIC; 
  signal GND : STD_LOGIC; 
  signal NlwInverterSignal_ps2data_OUTBUF_GTS_AND_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_vsyncb_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_rgb_0_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_rgb_1_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_rgb_2_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_rgb_3_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_rgb_4_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_rgb_5_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_rgb_6_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_rgb_7_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal NlwInverterSignal_ps2clk_OUTBUF_GTS_AND_IN1 : STD_LOGIC; 
  signal NlwInverterSignal_hsyncb_OUTBUF_GTS_TRI_CTL : STD_LOGIC; 
  signal mousex : STD_LOGIC_VECTOR ( 9 downto 0 ); 
  signal clocknum_count : STD_LOGIC_VECTOR ( 5 downto 0 ); 
  signal hcnt : STD_LOGIC_VECTOR ( 10 downto 0 ); 
  signal vcnt : STD_LOGIC_VECTOR ( 9 downto 1 ); 
  signal showdata_vcnt : STD_LOGIC_VECTOR ( 0 downto 0 ); 
  signal mousedata_m2_state : STD_LOGIC_VECTOR ( 13 downto 0 ); 
  signal mousedata_m1_state : STD_LOGIC_VECTOR ( 5 downto 0 ); 
  signal mousedata_q : STD_LOGIC_VECTOR ( 32 downto 5 ); 
  signal mousedata_watchdog_timer_count : STD_LOGIC_VECTOR ( 8 downto 0 ); 
  signal mousedata_bitcount : STD_LOGIC_VECTOR ( 5 downto 0 ); 
  signal mousedata_debounce_timer_count : STD_LOGIC_VECTOR ( 1 downto 0 ); 
  signal boardrgb : STD_LOGIC_VECTOR ( 5 downto 3 ); 
  signal backcolor : STD_LOGIC_VECTOR ( 7 downto 6 ); 
begin
  mousedata_C383 : X_LUT4
    generic map(
      INIT => X"3232"
    )
    port map (