m4_0.do

台湾全华科技VHDL教材实例

vsim work.e

add wave a_std		
add wave b_std   
add wave a_bit   
add wave b_bit   
add wave std_out 
add wave bit_out      

force a_std 1
force b_std 1
force a_bit 1
force b_bit 1
run 100

force a_std 1
force b_std 0
force a_bit 0
force b_bit 1
run 100

force a_std 1
force b_std U
force a_bit 1
force b_bit 0
run 100

force a_std 1
force b_std X
force a_bit 0
force b_bit 1
run 100

force a_std 1
force b_std Z
force a_bit 0
force b_bit 1
run 100

force a_std 1
force b_std H
force a_bit 0
force b_bit 1
run 100

force a_std 1
force b_std L
force a_bit 0
force b_bit 1
run 100