time_sim.sdf

台湾全华科技VHDL教材实例

// The TEMPERATURE and VOLTAGE fields in the SDF file produced by Xilinx are currently
// not implemented.  These fields are place holders.  These fields will be implemented
// in a future release.
(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "PinCheck")
  (DATE "Wed Jul 12 00:05:32 2000 ")
  (VENDOR "Xilinx")
  (PROGRAM "Xilinx VHDL SDF writer")
  (VERSION "C.18")
  (DIVIDER /)
  (VOLTAGE 4.75:4.75:4.75)
  (PROCESS "best=1.0:nom=1.0:worst=1.0")
  (TEMPERATURE 85:85:85)
  (TIMESCALE 1 ps)
  (CELL
    (CELLTYPE "X_CKBUF")
      (INSTANCE C398)
        (DELAY
          (ABSOLUTE
            (PORT I (9:9:9) (9:9:9))
            (IOPATH I O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_CKBUF")
      (INSTANCE C399)
        (DELAY
          (ABSOLUTE
            (PORT I (3065:3065:3065) (3065:3065:3065))
            (IOPATH I O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N782_SR_0)
        (DELAY
          (ABSOLUTE
            (PORT I (1717:1717:1717) (1717:1717:1717))
            (IOPATH I O (468:468:468) (468:468:468))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N782_DIN_1)
        (DELAY
          (ABSOLUTE
            (PORT I (834:834:834) (834:834:834))
            (IOPATH I O (468:468:468) (468:468:468))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE N782_DFF_OUT_DFFY)
        (DELAY
          (ABSOLUTE
            (PORT CLK (1482:1482:1482) (1482:1482:1482))
            (PORT CE (1474:1474:1474) (1474:1474:1474))
            (IOPATH CLK O (715:715:715) (715:715:715))
            (IOPATH SET O (715:715:715) (715:715:715))
            (IOPATH RST O (1547:1547:1547) (1547:1547:1547))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (328:328:328))
          (SETUP (negedge I) (posedge CLK) (328:328:328))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (2275:2275:2275))
          (WIDTH (negedge CLK) (2275:2275:2275))
          (SETUP (posedge CE) (posedge CLK) (473:473:473))
          (SETUP (negedge CE) (posedge CLK) (473:473:473))
          (HOLD (posedge CE) (posedge CLK) (0:0:0))
          (HOLD (negedge CE) (posedge CLK) (0:0:0))
          (WIDTH (posedge RST) (3640:3640:3640))
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N782_DFF_OUT_YMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (650:650:650) (650:650:650))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N782_DFF_OUT_YQMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (610:610:610) (610:610:610))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N782_DFF_OUT_XMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (650:650:650) (650:650:650))
          )
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE N782_DFF_OUT_DFFY_GSR_OR_2)
        (DELAY
          (ABSOLUTE
            (PORT I1 (8953:8953:8953) (8953:8953:8953))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N782_FGBLOCK_LUTRAM_FLUT_AND0)
        (DELAY
          (ABSOLUTE
            (PORT I0 (638:638:638) (638:638:638))
            (PORT I1 (1707:1707:1707) (1707:1707:1707))
            (IOPATH I0 O (416:416:416) (416:416:416))
            (IOPATH I1 O (416:416:416) (416:416:416))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N782_FGBLOCK_LUTRAM_GLUT_AND0_3)
        (DELAY
          (ABSOLUTE
            (PORT I0 (534:534:534) (534:534:534))
            (PORT I1 (1707:1707:1707) (1707:1707:1707))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N782_FGBLOCK_LUTRAM_GLUT_AND1)
        (DELAY
          (ABSOLUTE
            (PORT I1 (638:638:638) (638:638:638))
            (IOPATH I0 O (416:416:416) (416:416:416))
            (IOPATH I1 O (416:416:416) (416:416:416))
          )
        )
  )
  (CELL
    (CELLTYPE "X_INV")
      (INSTANCE C10_N80_DFF_OUT_YMUX)
        (DELAY
          (ABSOLUTE
            (PORT I (2739:2739:2739) (2739:2739:2739))
            (IOPATH I O (650:650:650) (650:650:650))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE C10_N80_DFF_OUT_XMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (650:650:650) (650:650:650))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE C10_N80_FGBLOCK_LUTRAM_FLUT_AND0)
        (DELAY
          (ABSOLUTE
            (PORT I0 (2230:2230:2230) (2230:2230:2230))
            (PORT I1 (954:954:954) (954:954:954))
            (IOPATH I0 O (416:416:416) (416:416:416))
            (IOPATH I1 O (416:416:416) (416:416:416))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N49_SR_4)
        (DELAY
          (ABSOLUTE
            (PORT I (1044:1044:1044) (1044:1044:1044))
            (IOPATH I O (468:468:468) (468:468:468))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N49_H1_5)
        (DELAY
          (ABSOLUTE
            (PORT I (534:534:534) (534:534:534))
            (IOPATH I O (468:468:468) (468:468:468))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE N49_DFF_OUT_DFFY)
        (DELAY
          (ABSOLUTE
            (PORT CLK (1486:1486:1486) (1486:1486:1486))
            (PORT CE (1798:1798:1798) (1798:1798:1798))
            (IOPATH CLK O (715:715:715) (715:715:715))
            (IOPATH SET O (1547:1547:1547) (1547:1547:1547))
            (IOPATH RST O (715:715:715) (715:715:715))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (328:328:328))
          (SETUP (negedge I) (posedge CLK) (328:328:328))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (2275:2275:2275))
          (WIDTH (negedge CLK) (2275:2275:2275))
          (SETUP (posedge CE) (posedge CLK) (473:473:473))
          (SETUP (negedge CE) (posedge CLK) (473:473:473))
          (HOLD (posedge CE) (posedge CLK) (0:0:0))
          (HOLD (negedge CE) (posedge CLK) (0:0:0))
          (WIDTH (posedge SET) (3640:3640:3640))
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N49_DFF_OUT_YMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (650:650:650) (650:650:650))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N49_DFF_OUT_YQMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (610:610:610) (610:610:610))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N49_DFF_OUT_XMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (650:650:650) (650:650:650))
          )
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE N49_DFF_OUT_DFFY_GSR_OR_6)
        (DELAY
          (ABSOLUTE
            (PORT I1 (8953:8953:8953) (8953:8953:8953))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N49_FGBLOCK_LUTRAM_FLUT_AND0_7)
        (DELAY
          (ABSOLUTE
            (PORT I0 (757:757:757) (757:757:757))
            (PORT I1 (1100:1100:1100) (1100:1100:1100))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND3")
      (INSTANCE N49_FGBLOCK_LUTRAM_FLUT_AND1)
        (DELAY
          (ABSOLUTE
            (PORT I1 (714:714:714) (714:714:714))
            (PORT I2 (742:742:742) (742:742:742))
            (IOPATH I0 O (416:416:416) (416:416:416))
            (IOPATH I1 O (416:416:416) (416:416:416))
            (IOPATH I2 O (416:416:416) (416:416:416))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N49_FGBLOCK_LUTRAM_GLUT_AND0)
        (DELAY
          (ABSOLUTE
            (PORT I0 (742:742:742) (742:742:742))
            (PORT I1 (714:714:714) (714:714:714))
            (IOPATH I0 O (416:416:416) (416:416:416))
            (IOPATH I1 O (416:416:416) (416:416:416))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N49_HLUT_AND0)
        (DELAY
          (ABSOLUTE
            (PORT I1 (260:260:260) (260:260:260))
            (IOPATH I0 O (585:585:585) (585:585:585))
            (IOPATH I1 O (585:585:585) (585:585:585))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N51_SR_8)
        (DELAY
          (ABSOLUTE
            (PORT I (1143:1143:1143) (1143:1143:1143))
            (IOPATH I O (468:468:468) (468:468:468))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N51_H1_9)
        (DELAY
          (ABSOLUTE
            (PORT I (1470:1470:1470) (1470:1470:1470))
            (IOPATH I O (468:468:468) (468:468:468))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE N51_DFF_OUT_DFFY)
        (DELAY
          (ABSOLUTE
            (PORT CLK (1475:1475:1475) (1475:1475:1475))
            (PORT CE (1106:1106:1106) (1106:1106:1106))
            (IOPATH CLK O (715:715:715) (715:715:715))
            (IOPATH SET O (715:715:715) (715:715:715))
            (IOPATH RST O (1547:1547:1547) (1547:1547:1547))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (328:328:328))
          (SETUP (negedge I) (posedge CLK) (328:328:328))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (2275:2275:2275))
          (WIDTH (negedge CLK) (2275:2275:2275))
          (SETUP (posedge CE) (posedge CLK) (473:473:473))
          (SETUP (negedge CE) (posedge CLK) (473:473:473))
          (HOLD (posedge CE) (posedge CLK) (0:0:0))
          (HOLD (negedge CE) (posedge CLK) (0:0:0))
          (WIDTH (posedge RST) (3640:3640:3640))
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N51_DFF_OUT_YMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (650:650:650) (650:650:650))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N51_DFF_OUT_YQMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (610:610:610) (610:610:610))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE N51_DFF_OUT_XMUX)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (650:650:650) (650:650:650))
          )
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE N51_DFF_OUT_DFFY_GSR_OR_10)
        (DELAY
          (ABSOLUTE
            (PORT I1 (8953:8953:8953) (8953:8953:8953))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N51_FGBLOCK_LUTRAM_FLUT_AND0_11)
        (DELAY
          (ABSOLUTE
            (PORT I0 (1122:1122:1122) (1122:1122:1122))
            (PORT I1 (1008:1008:1008) (1008:1008:1008))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND3")
      (INSTANCE N51_FGBLOCK_LUTRAM_FLUT_AND1)
        (DELAY
          (ABSOLUTE
            (PORT I1 (512:512:512) (512:512:512))
            (PORT I2 (1117:1117:1117) (1117:1117:1117))
            (IOPATH I0 O (416:416:416) (416:416:416))
            (IOPATH I1 O (416:416:416) (416:416:416))
            (IOPATH I2 O (416:416:416) (416:416:416))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N51_FGBLOCK_LUTRAM_GLUT_AND0_12)
        (DELAY
          (ABSOLUTE
            (PORT I0 (1136:1136:1136) (1136:1136:1136))
            (PORT I1 (512:512:512) (512:512:512))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N51_FGBLOCK_LUTRAM_GLUT_AND1_13)
        (DELAY
          (ABSOLUTE
            (PORT I1 (1278:1278:1278) (1278:1278:1278))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N51_FGBLOCK_LUTRAM_GLUT_AND2_14)
        (DELAY
          (ABSOLUTE
            (PORT I0 (512:512:512) (512:512:512))
            (PORT I1 (1136:1136:1136) (1136:1136:1136))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE N51_FGBLOCK_LUTRAM_GLUT_AND3_15)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")