m10_9.do

台湾全华科技VHDL教材实例

vsim work.CFG_RAMTest

add wave -hex addr	
add wave clk	
add wave -hex di		
add wave we		
add wave en		
add wave rst	
add wave -hex do	
	
force clk 0 0, 1 25 -r 50
force rst 1
force en 0
force we 0
force di 16#0
force addr 16#0
run 125

force rst 0
run 50

run 50

force en 0 0, 1 25 -r 50
force we 0 0, 1 25 -r 50
force di 16#1
force addr 16#1
run 50

force di 16#2
force addr 16#2
run 50

force di 16#3
force addr 16#3
run 50

force di 16#4
force addr 16#4
run 50

noforce we
force we 0
run 100

force addr 16#3
run 50

force addr 16#2
run 50

force addr 16#1
run 50

noforce en
force en 0
run 100

force addr 16#4
run 50

force rst 1
force en 1
run 100

force rst 0
force en 1
force addr 16#1
run 50

force addr 16#2
run 50

force addr 16#3
run 50

force addr 16#4
run 100