m5_4.do

台湾全华科技VHDL教材实例

vsim work.V5_4

add wave clk	    
add wave rst		
add wave temps
add wave dataouts 
add wave dataoutv	

force rst 0
force clk 0 0, 1 25 -r 50
run 120

force rst 1
run 80
run 600