📄 udasyncounter_vhd.sdo
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// Copyright (C) 1991-2005 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions
// and other software and tools, and its AMPP partner logic
// functions, and any output files any of the foregoing
// (including device programming or simulation files), and any
// associated documentation or information are expressly subject
// to the terms and conditions of the Altera Program License
// Subscription Agreement, Altera MegaCore Function License
// Agreement, or other applicable license agreement, including,
// without limitation, that your use is for the sole purpose of
// programming logic devices manufactured by Altera and sold by
// Altera or its authorized distributors. Please refer to the
// applicable agreement for further details.
//
// Device: Altera EP1C6Q240C8 Package PQFP240
//
//
// This SDF file should be used for ModelSim (VHDL) only
//
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "UDasyncounter")
(DATE "10/10/2007 15:59:14")
(VENDOR "Altera")
(PROGRAM "Quartus II")
(VERSION "Version 5.1 Build 176 10/26/2005 SJ Web Edition")
(DIVIDER .)
(TIMESCALE 1 ps)
(CELL
(CELLTYPE "cyclone_asynch_io")
(INSTANCE \\clk\~I\\.asynch_inst)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1469:1469:1469) (1469:1469:1469))
)
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\Q\~8_I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (522:522:522) (551:551:551))
(IOPATH datac regin (478:478:478) (478:478:478))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\Q\~8_I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (1436:1436:1436) (1457:1457:1457))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_io")
(INSTANCE \\reset\~I\\.asynch_inst)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1469:1469:1469) (1469:1469:1469))
)
)
)
(CELL
(CELLTYPE "cyclone_asynch_io")
(INSTANCE \\ud\~I\\.asynch_inst)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1469:1469:1469) (1469:1469:1469))
)
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\Q\[0\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datab (502:502:502) (513:513:513))
(PORT datac (503:503:503) (537:537:537))
(IOPATH datab regin (607:607:607) (607:607:607))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\Q\[0\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aload (1316:1316:1316) (1208:1208:1208))
(PORT datac (873:873:873) (907:907:907))
(PORT aclr (1644:1644:1644) (1623:1623:1623))
(PORT clk (1457:1457:1457) (1436:1436:1436))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
(IOPATH (posedge aload) regout (956:956:956) (956:956:956))
(IOPATH datac regout (0:0:0) (0:0:0))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\Q\~0_I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (530:530:530) (556:556:556))
(IOPATH datac regin (478:478:478) (478:478:478))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\Q\~0_I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (4211:4211:4211) (4191:4191:4191))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\Q\[1\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (529:529:529) (540:540:540))
(PORT datac (521:521:521) (549:549:549))
(IOPATH dataa regin (738:738:738) (738:738:738))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\Q\[1\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aload (1292:1292:1292) (1206:1206:1206))
(PORT datac (891:891:891) (919:919:919))
(PORT aclr (1624:1624:1624) (1605:1605:1605))
(PORT clk (4191:4191:4191) (4211:4211:4211))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
(IOPATH (posedge aload) regout (956:956:956) (956:956:956))
(IOPATH datac regout (0:0:0) (0:0:0))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\Q\~1_I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (522:522:522) (550:550:550))
(IOPATH datac regin (478:478:478) (478:478:478))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\Q\~1_I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (4771:4771:4771) (4722:4722:4722))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\Q\[2\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (522:522:522) (535:535:535))
(PORT datac (504:504:504) (538:538:538))
(IOPATH dataa regin (738:738:738) (738:738:738))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\Q\[2\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aload (1339:1339:1339) (1249:1249:1249))
(PORT datac (874:874:874) (908:908:908))
(PORT aclr (1662:1662:1662) (1641:1641:1641))
(PORT clk (4722:4722:4722) (4771:4771:4771))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
(IOPATH (posedge aload) regout (956:956:956) (956:956:956))
(IOPATH datac regout (0:0:0) (0:0:0))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\Q\~2_I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (522:522:522) (551:551:551))
(IOPATH datac regin (478:478:478) (478:478:478))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\Q\~2_I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (4937:4937:4937) (4865:4865:4865))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\Q\[3\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datab (502:502:502) (513:513:513))
(PORT datac (503:503:503) (537:537:537))
(IOPATH datab regin (607:607:607) (607:607:607))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\Q\[3\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aload (1279:1279:1279) (1193:1193:1193))
(PORT datac (873:873:873) (907:907:907))
(PORT aclr (1624:1624:1624) (1605:1605:1605))
(PORT clk (4865:4865:4865) (4937:4937:4937))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
(IOPATH (posedge aload) regout (956:956:956) (956:956:956))
(IOPATH datac regout (0:0:0) (0:0:0))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_io")
(INSTANCE \\Z\[0\]\~I\\.asynch_inst)
(DELAY
(ABSOLUTE
(PORT datain (1922:1922:1922) (2193:2193:2193))
(IOPATH datain padio (2124:2124:2124) (2124:2124:2124))
)
)
)
(CELL
(CELLTYPE "cyclone_asynch_io")
(INSTANCE \\Z\[1\]\~I\\.asynch_inst)
(DELAY
(ABSOLUTE
(PORT datain (1641:1641:1641) (1886:1886:1886))
(IOPATH datain padio (2108:2108:2108) (2108:2108:2108))
)
)
)
(CELL
(CELLTYPE "cyclone_asynch_io")
(INSTANCE \\Z\[2\]\~I\\.asynch_inst)
(DELAY
(ABSOLUTE
(PORT datain (3086:3086:3086) (3335:3335:3335))
(IOPATH datain padio (2124:2124:2124) (2124:2124:2124))
)
)
)
(CELL
(CELLTYPE "cyclone_asynch_io")
(INSTANCE \\Z\[3\]\~I\\.asynch_inst)
(DELAY
(ABSOLUTE
(PORT datain (863:863:863) (1144:1144:1144))
(IOPATH datain padio (2124:2124:2124) (2124:2124:2124))
)
)
)
)
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