boothsmulforfpu.vhd

来自「Booths Multiplier using Behavioral Model」· VHDL 代码 · 共 42 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

Entity Boothsmul is
 port(a,b : in signed(7 downto 0); 
	en : in std_logic;
	c: out signed(15 downto 0));
end Boothsmul;

Architecture beh of Boothsmul is
begin
 process(en)
 variable acc : signed(15 downto 0):=(others=>'0');
 variable ltwolsb : signed(1 downto 0) := "00";
 --variable count:integer := 8;
 begin
   if en = '1' and en'event then
    acc(7 downto 0) := acc(7 downto 0) + b;
    
    for i in 0 to 7 loop
--	 wait until clk = '1' and clk'event; 
      ltwolsb := acc(0) & ltwolsb(1);
      
      if ltwolsb(0) = '1' and ltwolsb(1) = '0' then
		acc(15 downto 8) := acc(15 downto 8) + a;
	  elsif ltwolsb(0) = '0' and ltwolsb(1) = '1' then
		acc(15 downto 8) := acc(15 downto 8) - a;
	  end if;
 
      acc := acc(15) & acc(15 downto 1);
 --     count := count - 1; 	
	 end loop;
   end if;
   c <= acc;
  end process; 
end beh;