boothsmul.fit.talkback.xml

Booths Multiplier using Behavioral Model

		<name>a[5]</name>
		<pin__>50</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>4</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>a[6]</name>
		<pin__>237</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>4</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>a[7]</name>
		<pin__>49</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>4</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>b[0]</name>
		<pin__>204</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>22</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>b[1]</name>
		<pin__>205</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>22</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>b[2]</name>
		<pin__>206</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>20</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>b[3]</name>
		<pin__>197</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>26</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>b[4]</name>
		<pin__>203</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>22</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>b[5]</name>
		<pin__>199</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>26</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>b[6]</name>
		<pin__>179</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>35</x_coordinate>
		<y_coordinate>20</y_coordinate>
		<cell_number>1</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>b[7]</name>
		<pin__>176</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>35</x_coordinate>
		<y_coordinate>19</y_coordinate>
		<cell_number>2</cell_number>
		<combinational_fan_out>1</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>no</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
	<row>
		<name>en</name>
		<pin__>29</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>11</y_coordinate>
		<cell_number>0</cell_number>
		<combinational_fan_out>16</combinational_fan_out>
		<registered_fan_out>0</registered_fan_out>
		<global>yes</global>
		<input_register>no</input_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
	</row>
</input_pins>
<output_pins>
	<row>
		<name>c[0]</name>
		<pin__>201</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>24</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[10]</name>
		<pin__>54</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>3</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[11]</name>
		<pin__>75</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>8</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[12]</name>
		<pin__>73</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>6</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>0</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[13]</name>
		<pin__>55</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>3</y_coordinate>
		<cell_number>2</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[14]</name>
		<pin__>53</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>3</y_coordinate>
		<cell_number>0</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[15]</name>
		<pin__>48</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>4</y_coordinate>
		<cell_number>0</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[1]</name>
		<pin__>96</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>22</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>2</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[2]</name>
		<pin__>208</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>20</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>2</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load>Unspecified</load>
	</row>
	<row>
		<name>c[3]</name>
		<pin__>198</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>26</x_coordinate>
		<y_coordinate>21</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<pci_i_o_enabled>no</pci_i_o_enabled>