cy7c1360.vhd

vhdl cod for ram.For sp3e

        END IF;

        OBuf2 := OBuf1;

        -- The State Machine
        CASE state IS
            WHEN desel =>
                CASE command IS
                    WHEN ds =>
                        OBuf1 := (OTHERS => 'Z');
                    WHEN begin_rw  | SCrd =>
                        IF command = begin_rw THEN
                            state <= begin_rdwr;
                        ELSE
                            state <= SCread;
                        END IF;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        Mem_read;
                    WHEN SCwr =>
                        state <= SCwrite;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        OBuf1 := (OTHERS => 'Z');
                        Mem_write;
                    WHEN SPwr_burst =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN SPwr_susp =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN read_burst =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN read_susp =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                END CASE;

            WHEN begin_rdwr | SCread =>
                Burst_Cnt := 0;
                CASE command IS
                    WHEN ds =>
                        state <= desel;
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN begin_rw  | SCrd =>
                        IF command = begin_rw THEN
                            state <= begin_rdwr;
                        ELSE
                            state <= SCread;
                        END IF;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        Mem_read;
                    WHEN SCwr =>
                        state <= SCwrite;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        OBuf1 := (OTHERS => 'Z');
                        Mem_write;
                    WHEN SPwr_burst =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN SPwr_susp =>
                        IF state = begin_rdwr THEN
                            state <= SPwrite;
                            OBuf1 := (OTHERS => 'Z');
                            OBuf2 := (OTHERS => 'Z');
                            Mem_write;
                        END IF;
                    WHEN read_burst =>
                        state <= read;
                        Burst_Cnt := Burst_Cnt + 1;
                        offset := Burst_Seq(memstart)(Burst_Cnt);
                        MemAddr := startaddr + offset;
                        Mem_read;
                    WHEN read_susp =>
                        OBuf1 := (OTHERS => 'Z');
                END CASE;

            WHEN SPwrite =>
                CASE command IS
                    WHEN ds =>
                        state <= desel;
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN begin_rw  | SCrd =>
                        IF command = begin_rw THEN
                            state <= begin_rdwr;
                        ELSE
                            state <= SCread;
                        END IF;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        Mem_read;
                    WHEN SCwr =>
                        state <= SCwrite;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        OBuf1 := (OTHERS => 'Z');
                        Mem_write;
                    WHEN SPwr_burst =>
                        state <= SPwrite;
                        Burst_Cnt := Burst_Cnt + 1;
                        IF (Burst_Cnt = 4) THEN
                            Burst_Cnt := 0;
                        END IF;
                        offset := Burst_Seq(memstart)(Burst_Cnt);
                        MemAddr := startaddr + offset;
                        OBuf1 := (OTHERS => 'Z');
                        Mem_write;
                    WHEN SPwr_susp =>
                        state <= SPwrite;
                        OBuf1 := (OTHERS => 'Z');
                        Mem_write;
                    WHEN read_burst =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN read_susp =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                END CASE;

            WHEN SCwrite =>
                Burst_Cnt := 0;
                CASE command IS
                    WHEN ds =>
                        state <= desel;
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN begin_rw  | SCrd =>
                        IF command = begin_rw THEN
                            state <= begin_rdwr;
                        ELSE
                            state <= SCread;
                        END IF;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        Mem_read;
                    WHEN SCwr =>
                        state <= SCwrite;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        OBuf1 := (OTHERS => 'Z');
                        Mem_write;
                    WHEN SPwr_burst =>
                        state <= SPwrite;
                        Burst_Cnt := Burst_Cnt + 1;
                        offset := Burst_Seq(memstart)(Burst_Cnt);
                        MemAddr := startaddr + offset;
                        OBuf1 := (OTHERS => 'Z');
                        Mem_write;
                    WHEN SPwr_susp =>
                        OBuf1 := (OTHERS => 'Z');
                    WHEN read_burst =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN read_susp =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                END CASE;

            WHEN read =>
                CASE command IS
                    WHEN ds =>
                        state <= desel;
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN begin_rw  | SCrd =>
                        IF command = begin_rw THEN
                            state <= begin_rdwr;
                        ELSE
                            state <= SCread;
                        END IF;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        Mem_read;
                    WHEN SCwr =>
                        state <= SCwrite;
                        MemAddr := to_nat(AddressIn);
                        startaddr := MemAddr;
                        memstart := to_nat(AddressIn(1 DOWNTO 0));
                        OBuf1 := (OTHERS => 'Z');
                        Mem_write;
                    WHEN SPwr_burst =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN SPwr_susp =>
                        OBuf1 := (OTHERS => 'Z');
                        OBuf2 := (OTHERS => 'Z');
                    WHEN read_burst =>
                        state <= read;
                        Burst_Cnt := Burst_Cnt + 1;
                        IF (Burst_Cnt = 4) THEN
                            Burst_Cnt := 0;
                        END IF;
                        offset := Burst_Seq(memstart)(Burst_Cnt);
                        MemAddr := startaddr + offset;
                        Mem_read;
                    WHEN read_susp =>
                        state <= read;
                END CASE;
        END CASE;

        IF (OENegIn = '0') THEN
           D_zd <= OBuf2;
        END IF;

    END IF;

    IF (OENegIn = '1') THEN
        D_zd <= (OTHERS => 'Z');
    ELSIF falling_edge(OENegIn) AND (ZZIn = '0') AND zz_reset THEN
        D_zd <= OBuf2;
    END IF;

    IF rising_edge(ZZIn) THEN
        IF zz_reset THEN
            IF state = desel THEN
                zz_start := TRUE;
                zz_false := FALSE;
            ELSE
                zz_start := FALSE;
                count := 0;
                zz_false := TRUE;
                ASSERT false
                    REPORT InstancePath & partID & "The device must be " &
                           "deselected prior to entering the sleep mode."
                    SEVERITY SeverityMode;
            END IF;
        ELSE
            zz_stop := FALSE;
            count := 0;
            ASSERT false
                REPORT InstancePath & partID & ": 2tCYC are "
                       &  "required to exit from sleep mode."
                SEVERITY SeverityMode;
        END IF;
    ELSIF falling_edge(ZZIn) THEN
        IF zz_reset THEN
            zz_start := FALSE;
            count := 0;
            IF NOT zz_false THEN
                ASSERT false
                    REPORT InstancePath & partID & ": 2tCYC are "
                           & "required to enter into sleep mode."
                    SEVERITY SeverityMode;
            END IF;
        ELSE
            zz_stop := TRUE;
        END IF;
    END IF;

    IF rising_edge(CLKIn) THEN
        IF zz_start THEN
            IF count < 2 THEN
                count := count + 1;
            ELSE
                zz_reset := FALSE;
                zz_start := FALSE;
                count := 0;
            END IF;
        END IF;
        IF zz_stop THEN
            IF count < 2 THEN
                count := count + 1;
            ELSE
                zz_reset := TRUE;
                zz_stop := FALSE;
                count := 0;
            END IF;
        END IF;
    END IF;

    IF NOT zz_reset AND zz_stop AND (CE2In = '1' OR CE1NegIn = '0'
    OR CE3NegIn = '0' OR ADSPNIn = '0' OR ADSCNIn = '0') THEN
        ASSERT FALSE
            REPORT InstancePath & partID & ": CEs, ADSC and ADSP must " &
            "remain inac