📄 idt703399prf.ftm

📁 vhdl cod for ram.For sp3e
💻 FTM
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<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for idt703399prf Parts</TITLE><BODY><REVISION.HISTORY>version: |  author:  | mod date: | changes made:  V1.0    R. Munden    01 Mar 28   Initial release</REVISION.HISTORY><TIMESCALE>1ns</TIMESCALE><MODEL>idt703399prf<FMFTIME>IDT70V3399S133PRF<SOURCE>Integrated Device Technology DSC 5623/2 July 2000</SOURCE><COMMENT>The Values listed are for VCC=3.3V +/- 150mV, CL=10pF, Ta=0 to 70C</COMMENT><COMMENT>For each parameter only minimum or maximum values were provided by the vendor, other values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (COND PIPER == 1 (IOPATH CLKR IOR0 (1.4:2.8:4.2) (1.4:2.8:4.2) (1:2:3) (1:2:3) (1:2:3) (1:2:3)))    (IOPATH OELNeg IOL0 () () (1:2.8:4.2) (1:2.8:4.2) (1:2.8:4.2) (1:2.8:4.2))  ))  (TIMINGCHECK    (SETUP AL0 CLKL (1.8))    (SETUP CE1L CLKL (1.8))    (SETUP RWL CLKL (1.8))    (SETUP IOL0 CLKL (1.8))    (SETUP ADSLNeg CLKL (1.8))    (SETUP CNTENLNeg CLKL (1.8))    (SETUP REPEATLNeg CLKL (1.8))    (HOLD AL0 CLKL (.5))    (HOLD CE1L CLKL (.5))    (HOLD RWL CLKL (.5))    (HOLD IOL0 CLKL (.5))    (HOLD ADSLNeg CLKL (.5))    (HOLD CNTENLNeg CLKL (.5))    (HOLD REPEATLNeg CLKL (.5))    (WIDTH (COND PIPER_EQ_1_negedge CLKR) (2.6))    (WIDTH (COND PIPER_EQ_1_posedge CLKR) (2.6))    (PERIOD (COND PIPER_EQ_1_posedge CLKR) (7.5))  )</TIMING></FMFTIME><FMFTIME>IDT70V3399S166PRF<SOURCE>Integrated Device Technology DSC 5623/2 July 2000</SOURCE><COMMENT>The Values listed are for VCC=3.3V +/- 150mV, CL=10pF, Ta=0 to 70C</COMMENT><COMMENT>For each parameter only minimum or maximum values were provided by the vendor, other values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE    (COND PIPER == 1 (IOPATH CLKR IOR0 (1.2:2.4:3.6) (1.2:2.4:3.6) (1:2:3) (1:2:3) (1:2:3) (1:2:3)))    (IOPATH OELNeg IOL0 () () (1:2.4:3.6) (1:2.4:3.6) (1:2.4:3.6) (1:2.4:3.6))  ))  (TIMINGCHECK    (SETUP AL0 CLKL (1.7))    (SETUP CE1L CLKL (1.7))    (SETUP RWL CLKL (1.7))    (SETUP IOL0 CLKL (1.7))    (SETUP ADSLNeg CLKL (1.7))    (SETUP CNTENLNeg CLKL (1.7))    (SETUP REPEATLNeg CLKL (1.7))    (HOLD AL0 CLKL (.5))    (HOLD CE1L CLKL (.5))    (HOLD RWL CLKL (.5))    (HOLD IOL0 CLKL (.5))    (HOLD ADSLNeg CLKL (.5))    (HOLD CNTENLNeg CLKL (.5))    (HOLD REPEATLNeg CLKL (.5))    (WIDTH (COND PIPER_EQ_1_negedge CLKR) (2.1))    (WIDTH (COND PIPER_EQ_1_posedge CLKR) (2.1))    (PERIOD (COND PIPER_EQ_1_posedge CLKR) (6))  )</TIMING></FMFTIME></BODY></FTML>
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